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path: root/drivers/gpu/drm/i915/gt
AgeCommit message (Expand)AuthorFilesLines
2020-07-14drm/i915/gt: Only swap to a random sibling once upon creationChris Wilson1-14/+4
2020-07-14drm/i915/gt: Ignore irq enabling on the virtual enginesChris Wilson1-0/+1
2020-07-14drm/i915/selftests: Fix compare functions provided for sortingSudeep Holla1-4/+4
2020-07-08drm/i915/gt: Pin the rings before marking activeChris Wilson1-6/+6
2020-06-29drm/i915: Include asm sources for {ivb, hsw}_clear_kernel.cRodrigo Vivi3-0/+282
2020-06-16drm/i915/gt: Move gen4 GT workarounds from init_clock_gating to workaroundsChris Wilson1-5/+22
2020-06-16drm/i915/gt: Move ilk GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+14
2020-06-16drm/i915/gt: Move snb GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+41
2020-06-16drm/i915/gt: Move vlv GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+59
2020-06-16drm/i915/gt: Move ivb GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+62
2020-06-16drm/i915/gt: Move hsw GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+48
2020-06-16drm/i915/gt: Incrementally check for rewindingChris Wilson5-4/+153
2020-06-16drm/i915/gt: Prevent timeslicing into unpreemptable requestsChris Wilson2-1/+118
2020-06-16drm/i915/selftests: Restore to default heartbeatChris Wilson4-109/+67
2020-06-15drm/i915: work around false-positive maybe-uninitialized warningArnd Bergmann1-0/+2
2020-06-15drm/i915/gt: Incorporate the virtual engine into timeslicingChris Wilson1-6/+24
2020-05-25drm/i915/gt: Remove errant assertion in __intel_context_do_pinChris Wilson1-2/+0
2020-05-14drm/i915/gt: Transfer old virtual breadcrumbs to irq_workerChris Wilson4-34/+57
2020-05-14drm/i915: Show per-engine default property values in sysfsChris Wilson3-1/+97
2020-05-14drm/i915: Drop no-semaphore boostingChris Wilson2-9/+1
2020-05-13drm/i915: Mark the addition of the initial-breadcrumb in the requestChris Wilson1-1/+4
2020-05-13drm/i915: Remove duplicate inline specifier on write_pteNathan Chancellor1-1/+1
2020-05-13drm/i915/gt: Suspend tasklets before resume sanitizationChris Wilson1-4/+4
2020-05-13drm/i915/gt: Reset execlists registers before HWSPChris Wilson1-7/+14
2020-05-13drm/i915/ehl: Restrict w/a 1607087056 for EHL/JSLSwathi Dhanavanthri1-4/+7
2020-05-11drm/i915/gt: Restore Cherryview back to full-ppgttChris Wilson1-0/+54
2020-05-11drm/i915/gt: Force pte cacheline to main memoryMika Kuoppala1-2/+13
2020-05-11drm/i915/selftests: Always flush before unpining after writingChris Wilson2-0/+4
2020-05-11drm/i915: Emit await(batch) before MI_BB_STARTChris Wilson1-7/+9
2020-05-11drm/i915: Make intel_timeline_init staticMika Kuoppala2-9/+4
2020-05-11drm/i915/gt: Mark up the racy read of execlists->context_tagChris Wilson1-1/+1
2020-05-09drm/i915: Replace zero-length array with flexible-arrayGustavo A. R. Silva1-1/+1
2020-05-08drm/i915/gt: Improve precision on defer_request assertChris Wilson1-1/+2
2020-05-07drm/i915/gen12: Add aux table invalidate for all enginesMika Kuoppala1-5/+81
2020-05-07drm/i915: Remove wait priority boostingChris Wilson2-4/+2
2020-05-07drm/i915: Mark concurrent submissions with a weak-dependencyChris Wilson1-0/+3
2020-05-07drm/i915/gen12: Invalidate aux table entries forciblyMika Kuoppala1-1/+15
2020-05-07drm/i915/gen12: Flush L3Mika Kuoppala1-0/+2
2020-05-07drm/i915/gen12: Fix HDC pipeline flushMika Kuoppala3-21/+44
2020-05-07Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"Mika Kuoppala2-2/+0
2020-05-05drm/i915/gt: Stop holding onto the pinned_default_stateChris Wilson5-46/+47
2020-05-05drm/i915/execlists: Record the active CCID from before resetChris Wilson2-1/+8
2020-05-05drm/i915/gt: Small tidy of gen8+ breadcrumb emissionChris Wilson1-19/+15
2020-05-04drm/i915/selftests: Repeat the rps clock frequency measurementChris Wilson1-14/+40
2020-05-04drm/i915: Remove cnl pre-prod workaroundsVille Syrjälä2-24/+1
2020-05-04drm/i915/gem: Implement legacy MI_STORE_DATA_IMMChris Wilson1-31/+2
2020-05-03drm/i915/gt: Sanitize RPS interrupts upon resumeChris Wilson3-1/+7
2020-05-01drm/i915/gt: Make timeslicing an explicit engine propertyChris Wilson3-14/+18
2020-04-30drm/i915/gt: Move the batch buffer pool from the engine to the gtChris Wilson10-94/+136
2020-04-30drm/i915/gt: Restore aggressive post-boost downclockingChris Wilson1-16/+4
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