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path: root/drivers/gpu/drm/i915/display/intel_vblank.c
AgeCommit message (Expand)AuthorFilesLines
2025-03-25drm/i915: Replace the HAS_DDI() in intel_crtc_scanline_offset() with specific...Ville Syrjälä1-2/+3
2025-03-25drm/i915: Reverse the scanline_offset if ladderVille Syrjälä1-3/+3
2025-03-25drm/i915: Fix scanline_offset for LNL+ and BMG+Ville Syrjälä1-1/+3
2025-01-23drm/i915/display: fix typos in i915/display filesNitin Gote1-1/+1
2025-01-15drm/i915/vrr: Introduce intel_vrr_vblank_delay()Ville Syrjälä1-1/+6
2025-01-15drm/i915: Extract intel_crtc_active_timings()Ville Syrjälä1-11/+22
2025-01-15drm/i915: Consolidate intel_pre_commit_crtc_state()Ville Syrjälä1-10/+28
2025-01-15drm/i915: Extract intel_mode_vblank_delay()Ville Syrjälä1-2/+6
2025-01-15drm/i915: Introduce intel_vrr_{vmin,vmax}_vtotal()Ville Syrjälä1-2/+2
2024-10-30drm/i915/vblank: use display->platform.<platform> instead of IS_<PLATFORM>()Jani Nikula1-4/+4
2024-10-30drm/i915/vblank: drop unnecessary i915 local variableJani Nikula1-2/+1
2024-09-05drm/i915/display: include drm/drm_vblank.h where neededJani Nikula1-0/+2
2024-08-29drm/i915/dsb: Account for VRR properly in DSB scanline stuffVille Syrjälä1-9/+1
2024-08-29drm/i915/dsb: Convert dewake_scanline to a hw scanline number earlierVille Syrjälä1-5/+4
2024-08-23drm/i915/vblank: convert to struct intel_displayJani Nikula1-47/+50
2024-08-23drm/i915/vblank: fix context imbalance warningsJani Nikula1-4/+10
2024-08-23drm/i915/vblank: use drm_crtc_vblank_crtc() instead of open-codingJani Nikula1-2/+2
2024-07-12drm/i915: Calculate vblank delay more accuratelyVille Syrjälä1-1/+2
2024-06-20drm/i915: Introduce intel_mode_vdisplay()Ville Syrjälä1-0/+10
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_FRMCOUNT_G4XJani Nikula1-1/+1
2024-06-07drm/i915: pass dev_priv explicitly to PIPEFRAMEPIXELJani Nikula1-2/+2
2024-06-07drm/i915: pass dev_priv explicitly to PIPEFRAMEJani Nikula1-1/+2
2024-06-07drm/i915: pass dev_priv explicitly to PIPEDSLJani Nikula1-3/+4
2024-06-05drm/i915/dsb: Use intel_color_uses_dsb()Ville Syrjälä1-1/+3
2024-05-31drm/i915: Move intel_crtc_scanline_offset()Ville Syrjälä1-38/+38
2024-05-31drm/i915: Simplify scanline_offset handling for gen2Ville Syrjälä1-5/+3
2024-05-31drm/i915: Extract intel_mode_vtotal()Ville Syrjälä1-23/+17
2024-05-31drm/i915: Extract intel_mode_vblank_end()Ville Syrjälä1-4/+12
2024-05-31drm/i915: Reuse intel_mode_vblank_start()Ville Syrjälä1-6/+3
2024-05-08drm/i915: Use drm_crtc_vblank_crtc()Ville Syrjälä1-11/+5
2024-01-22drm/i915: Move intel_vblank_evade() & co. into intel_vblank.cVille Syrjälä1-0/+130
2023-12-07drm/i915: handle uncore spinlock when not availableLuca Coelho1-10/+41
2023-09-27drm/i915: Introduce intel_crtc_scanline_to_hw()Ville Syrjälä1-0/+14
2023-04-13drm/i915: Use min() instead of hand rolling itVille Syrjälä1-2/+1
2023-04-12drm/i915/vrr: Tell intel_crtc_update_active_timings() about VRR explicitlyVille Syrjälä1-3/+9
2023-03-18drm/i915: Extract intel_crtc_scanline_offset()Ville Syrjälä1-41/+48
2023-03-18drm/i915: Relocate intel_crtc_update_active_timings()Ville Syrjälä1-0/+85
2023-02-18drm/i915: s/PIPECONF/TRANSCONF/Ville Syrjälä1-2/+2
2023-01-18drm/i915/vblank: add and use intel_de_read64_2x32() to read vblank counterJani Nikula1-19/+6
2023-01-18drm/i915/vblank: use intel_de_read()Jani Nikula1-1/+1
2023-01-18drm/i915/display: move more scanline functions to intel_vblank.[ch]Jani Nikula1-0/+35
2023-01-18drm/i915/irq: split out vblank/scanline code to intel_vblank.[ch]Jani Nikula1-0/+419
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-25 22:32:17 +0300