Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2021-07-29 | drm/i915/dg2: Update lane disable power state during PSR | Gwan-gyeong Mun | 1 | -0/+14 |
2021-07-29 | drm/i915/dg2: Wait for SNPS PHY calibration during display init | Matt Roper | 1 | -0/+15 |
2021-07-29 | drm/i915/dg2: Add vswing programming for SNPS phys | Matt Roper | 1 | -0/+54 |
2021-07-29 | drm/i915/dg2: Add MPLLB programming for HDMI | Matt Roper | 1 | -12/+274 |
2021-07-29 | drm/i915/dg2: Add MPLLB programming for SNPS PHY | Matt Roper | 1 | -0/+517 |