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path: root/drivers/gpu/drm/i915/display/intel_pch_display.c
AgeCommit message (Expand)AuthorFilesLines
2022-03-04drm/i915: Relocate a few more pch transcoder bitsVille Syrjälä1-0/+17
2022-03-04drm/i915: Relocate ibx pch port sanitation codeVille Syrjälä1-0/+67
2022-03-04drm/i915: Move framestart_delay to crtc_stateVille Syrjälä1-7/+8
2022-02-01drm/i915: Program pch transcoder m2/n2Ville Syrjälä1-6/+30
2022-02-01drm/i915: Move PCH transcoder M/N setup into the PCH codeVille Syrjälä1-0/+24
2022-02-01drm/i915: Split intel_cpu_transcoder_get_m_n() into M1/N1 vs. M2/N2 variantsVille Syrjälä1-4/+4
2022-02-01drm/i915: Nuke ilk_get_fdi_m_n_config()Ville Syrjälä1-2/+4
2022-01-26drm/i915: Clean up PCH_TRANSCONF/TRANS_DP_CTL bit definesVille Syrjälä1-6/+7
2022-01-26drm/i915: Clean up PIPECONF bit definesVille Syrjälä1-4/+3
2022-01-26drm/i915: Introduce ilk_pch_pre_enable()Ville Syrjälä1-0/+14
2021-10-19drm/i915: Introduce lpt_pch_disable()Ville Syrjälä1-1/+11
2021-10-19drm/i915: Introduce ilk_pch_disable() and ilk_pch_post_disable()Ville Syrjälä1-1/+36
2021-10-19drm/i915: Move iCLKIP readout to the pch codeVille Syrjälä1-0/+2
2021-10-19drm/i915: Extract ilk_pch_get_config()Ville Syrjälä1-0/+68
2021-10-19drm/i915: Move LPT PCH readout codeVille Syrjälä1-0/+18
2021-10-19drm/i915: Clean up the {ilk,lpt}_pch_enable() calling conventionVille Syrjälä1-10/+13
2021-10-19drm/i915: Move PCH modeset code to its own fileVille Syrjälä1-0/+365
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