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:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
gpu
/
drm
/
i915
/
display
/
intel_dpll_mgr.h
Age
Commit message (
Expand
)
Author
Files
Lines
2021-03-08
drm/i915: Use pipes instead crtc indices in PLL state tracking
Ville Syrjälä
1
-4
/
+4
2021-03-08
drm/i915: Do intel_dpll_readout_hw_state() after encoder readout
Ville Syrjälä
1
-0
/
+1
2020-11-16
drm/i915: Use actual readout results for .get_freq()
Ville Syrjälä
1
-3
/
+5
2020-11-16
drm/i915: Introduce intel_dpll_get_hw_state()
Ville Syrjälä
1
-0
/
+3
2020-10-16
drm/i915/dg1: Add DPLL macros for DG1
Aditya Swarup
1
-0
/
+17
2020-03-09
drm/i915: Fix documentation for intel_dpll_get_freq()
Imre Deak
1
-0
/
+6
2020-03-02
drm/i915/skl, cnl: Split out the WRPLL/LCPLL frequency calculation
Imre Deak
1
-3
/
+5
2020-03-02
drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.c
Imre Deak
1
-0
/
+2
2020-03-02
drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.c
Imre Deak
1
-0
/
+2
2019-10-25
drm/i915/tgl: Fix doc not corresponding to code
Anna Karas
1
-2
/
+2
2019-10-25
drm/i915: Describe structure member in documentation
Anna Karas
1
-0
/
+5
2019-07-12
drm/i915/tgl: Add new pll ids
Vandita Kulkarni
1
-5
/
+18
2019-07-11
drm/i915: Polish intel_shared_dpll_swap_state()
Ville Syrjälä
1
-2
/
+1
2019-07-05
drm/i915/ehl: Add support for DPLL4 (v10)
Vivek Kasireddy
1
-0
/
+6
2019-07-01
drm/i915: Keep the TypeC port mode fixed when the port is active
Imre Deak
1
-0
/
+3
2019-07-01
drm/i915/icl: Reserve all required PLLs for TypeC ports
Imre Deak
1
-0
/
+9
2019-07-01
drm/i915: Sanitize the shared DPLL reserve/release interface
Imre Deak
1
-6
/
+7
2019-06-17
drm/i915: move modesetting core code under display/
Jani Nikula
1
-0
/
+351