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path: root/drivers/gpu/drm/i915/display/intel_display_power_map.c
AgeCommit message (Expand)AuthorFilesLines
2025-03-10drm/i915/xe3lpd: Map POWER_DOMAIN_AUDIO_PLAYBACK to DC_offGustavo Sousa1-0/+1
2025-03-03drm/i915: relocate intel_plane_ggtt_offset() to intel_atomic_plane.cJani Nikula1-0/+2
2024-12-18drm/i915/display: drop unnecessary i915_drv.h includesJani Nikula1-4/+2
2024-12-02drm/i915/display: convert power map to struct intel_displayJani Nikula1-28/+28
2024-10-12drm/i915/xe3lpd: Add new display power wellsMatt Roper1-1/+133
2023-09-21drm/i915/xe2lpd: Add DC state supportMatt Roper1-0/+18
2023-09-21drm/i915/xe2lpd: Add display power wellRavi Kumar Vodapalli1-1/+35
2023-08-21drm/i915/display: Remove unused POWER_DOMAIN_MODESETGustavo Sousa1-9/+0
2023-06-20drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionalityImre Deak1-8/+8
2023-04-27drm/i915/display: Increase AUX timeout for Type-CSuraj Kandpal1-0/+7
2023-04-25drm/i915/adlp+: Disable DC5/6 states for TC port DDI/AUX and for combo port AUXImre Deak1-12/+16
2023-04-20drm/i915/mtl: Re-use ADL-P's "DC off" power wellMatt Roper1-15/+1
2023-04-20drm/i915: Use separate "DC off" power well for ADL-P and DG2Matt Roper1-3/+38
2023-01-25drm/i915/display: add intel_display_limits.h for key enumsJani Nikula1-0/+1
2022-11-18drm/i915: Add missing DC_OFF power domain->well mappingsImre Deak1-0/+8
2022-11-18drm/i915: Add missing AUX_IO_A power domain->well mappingsImre Deak1-0/+2
2022-11-18drm/i915/tgl+: Enable display DC power states on all eDP portsImre Deak1-5/+48
2022-11-18drm/i915: Move the POWER_DOMAIN_AUX_IO_A definition to its logical placeImre Deak1-3/+3
2022-09-13drm/i915/mtl: Add display power wellsImre Deak1-1/+114
2022-08-31drm/i915: move and group power related members under display.powerJani Nikula1-2/+2
2022-05-02drm/i915: move tons of power well initializers to rodataJani Nikula1-2/+2
2022-04-20drm/i915: Remove the XELPD specific AUX and DDI power domainsImre Deak1-14/+8
2022-04-20drm/i915: Remove duplicate DDI/AUX power domain mappingsImre Deak1-58/+31
2022-04-20drm/i915: Remove the ICL specific TBT power domainsImre Deak1-8/+8
2022-04-20drm/i915: Sanitize the ADL-S power well definitionImre Deak1-30/+39
2022-04-20drm/i915: Simplify the DG1 power well descriptorsImre Deak1-17/+7
2022-04-20drm/i915: Allow platforms to share power well descriptorsImre Deak1-159/+122
2022-04-20drm/i915: Simplify power well definitions by adding power well instancesImre Deak1-1073/+430
2022-04-20drm/i915: Convert the u64 power well domains mask to a bitmapImre Deak1-2/+2
2022-04-20drm/i915: Convert the power well descriptor domain mask to an array of domainsImre Deak1-710/+775
2022-04-20drm/i915: Sanitize the power well namesImre Deak1-127/+127
2022-04-20drm/i915: Rename the power domain names to end with pipes/portsImre Deak1-92/+92
2022-04-20drm/i915: Move the HSW power well flags to a common bitfieldImre Deak1-83/+83
2022-04-20drm/i915: Move the dg2 fixed_enable_delay power well param to a common bitfieldImre Deak1-5/+5
2022-04-20drm/i915: Move the power domain->well mappings to intel_display_power_map.cImre Deak1-0/+2150
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-27 18:00:00 +0300