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path: root/drivers/gpu/drm/i915/display/intel_display_power.h
AgeCommit message (Expand)AuthorFilesLines
2021-05-13drm/i915/xelpd: Add XE_LPD power wellsMatt Roper1-0/+9
2021-05-07drm/i915/xelpd: add XE_LPD display characteristicsMatt Roper1-0/+2
2021-02-24drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain namesImre Deak1-0/+32
2020-12-03drm/i915: Make intel_display_power_put_unchecked() an internal-only functionImre Deak1-2/+3
2020-12-03drm/i915: Track power reference taken to disable power well functionalityImre Deak1-0/+1
2020-12-03drm/i915: Rename power_domains.wakeref to init_wakerefImre Deak1-1/+1
2020-12-03drm/i915: Factor out helpers to get/put a set of tracked power domainsImre Deak1-0/+29
2020-10-16drm/i915/dg1: Add DG1 power wellsLucas De Marchi1-0/+1
2020-10-16drm/i915/cnl: skip PW_DDI_F on certain skusLucas De Marchi1-0/+2
2020-05-22drm/i915: Introduce for_each_dbuf_slice_in_mask macroStanislav Lisovskiy1-0/+1
2020-05-16drm/i915: Unify the low level dbuf codeVille Syrjälä1-3/+3
2020-04-18drm/i915/tc/tgl: Implement TC cold sequencesJosé Roberto de Souza1-0/+1
2020-04-17drm/i915: Add i915_lpsp_status debugfs attributeAnshuman Gupta1-0/+2
2020-04-17drm/i915: Power well id for ICL PG3Anshuman Gupta1-1/+1
2020-02-27drm/i915/tgl: Allow DC5/DC6 entry while PG2 is activeMatt Roper1-0/+1
2020-02-05drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy1-0/+5
2019-12-23drm/i915: fix comment for POWER_DOMAIN_TRANSCODER_VDSC_PW2Jani Nikula1-1/+1
2019-10-08drm/i915/tgl: Switch between dc3co and dc5 based on display idlenessAnshuman Gupta1-0/+2
2019-10-08drm/i915/tgl: Enable DC3CO state in "DC Off" power wellAnshuman Gupta1-0/+1
2019-08-28drm/i915: Align power domain names with port namesImre Deak1-26/+14
2019-08-16drm/i915: Move i915_power_well_id out of i915_reg.hDaniele Ceraolo Spurio1-0/+21
2019-08-07drm/i915: abstract display suspend/resume operationsRodrigo Vivi1-12/+5
2019-07-12drm/i915: Propagate "_remove" function name suffix downJanusz Krzysztofik1-1/+1
2019-07-12drm/i915/tgl: Add power well to support 4th pipeMika Kahola1-0/+3
2019-07-12drm/i915/tgl: Add power well supportImre Deak1-1/+25
2019-07-12drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder AJosé Roberto de Souza1-1/+2
2019-07-05drm/i915/ehl: Add support for DPLL4 (v10)Vivek Kasireddy1-0/+1
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula1-0/+288
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