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path: root/drivers/gpu/drm/amd/include
AgeCommit message (Expand)AuthorFilesLines
2025-05-13drm/amdgpu: add vcn v5_0_0 ip headersfanhuang2-0/+39
2025-05-13drm/amd: add definition for new memory typeTao Zhou1-0/+1
2025-05-01drm/amd/pm: Add board voltage node to hwmonAsad Kamal1-0/+1
2025-04-21drm/amdgpu: fix typo in atombios.hAlexandre Demers1-1/+1
2025-04-08drm/amdgpu/userq: move the header to amdgpu directoryAlex Deucher1-113/+0
2025-04-08drm/amdgpu: map doorbell for the requested userqSaleemkhan Jamadar1-0/+12
2025-04-08drm/amdgpu: Add mqd for userq compute queueArunpravin Paneer Selvam2-4/+4
2025-04-08drm/amdgpu: simplify eviction fence suspend/resumeShashank Sharma1-1/+6
2025-04-08drm/amdgpu: enable userqueue secure sem for GFX 12Arunpravin Paneer Selvam2-4/+4
2025-04-08drm/amdgpu: resume gfx userqueuesShashank Sharma1-1/+2
2025-04-08drm/amdgpu: suspend gfx userqueuesShashank Sharma1-0/+9
2025-04-08drm/amdgpu: add userqueue suspend/resume functionsShashank Sharma1-0/+5
2025-04-08drm/amdgpu: Few optimization and fixes for userq fence driverArunpravin Paneer Selvam1-1/+1
2025-04-08drm/amdgpu: Implement userqueue signal/wait IOCTLArunpravin Paneer Selvam1-0/+1
2025-04-08drm/amdgpu: Add mqd support for the fence addressArunpravin Paneer Selvam1-2/+2
2025-04-08drm/amdgpu: Implement a new userqueue fence driverArunpravin Paneer Selvam1-0/+1
2025-04-08drm/amdgpu: generate doorbell index for userqueueShashank Sharma1-0/+1
2025-04-08drm/amdgpu: map wptr BO into GARTShashank Sharma1-0/+1
2025-04-08drm/amdgpu: create context space for usermode queueShashank Sharma1-0/+1
2025-04-08drm/amdgpu: add helpers to create userqueue objectShashank Sharma1-0/+13
2025-04-08drm/amdgpu: add new IOCTL for usermode queueShashank Sharma1-0/+2
2025-04-08drm/amdgpu: add usermode queue base codeShashank Sharma1-0/+61
2025-04-08drm/amdgpu/pm: add workload profile pause helperAlex Deucher1-0/+1
2025-04-07drm/amdgpu: Fix typo in DC_DEBUG_MASK kernel-docDominik Kaszewski1-1/+1
2025-04-07drm/amdgpu: add missing SMU6 defines, shifts and masksAlexandre Demers2-3/+229
2025-04-07drm/amdgpu: keep removing sid.h dependency from si_dma.cAlexandre Demers1-0/+2
2025-04-07drm/amdgpu: add missing GFX6 definesAlexandre Demers1-0/+2
2025-04-07drm/amdgpu: add missing DMA defines, shifts and masksAlexandre Demers2-3/+59
2025-04-07drm/amdgpu: use proper defines, shifts and masks in DCE6 codeAlexandre Demers1-0/+2
2025-03-27drm/amd/pm: Add gpu_metrics_v1_8Asad Kamal1-0/+114
2025-03-18drm/amdgpu: Add debug masks for HDCP LC FW testingDominik Kaszewski1-0/+12
2025-03-14drm/amdgpu: Reduce dequeue retry timeout for gfx9 familyHarish Kasiviswanathan1-2/+3
2025-03-07drm/amdkfd: Add support for more per-process flagHarish Kasiviswanathan1-0/+2
2025-03-07drm/amd/amdgpu: Add missing GC 11.5.0 registerTom St Denis1-0/+2
2025-03-05drm/amdkfd: implement per queue sdma reset for gfx 9.4+Jonathan Kim1-0/+2
2025-03-05drm/amd/display: Add a new dcdebugmask to allow turning off brightness curveMario Limonciello1-0/+4
2025-03-05drm/amd: Pass luminance data to amdgpu_dm_backlight_capsMario Limonciello1-1/+3
2025-02-25drm/amdgpu: update the handle ptr in is_idleSunil Khatri1-1/+1
2025-02-19drm/amdgpu: update the handle ptr in get_clockgating_stateSunil Khatri1-1/+1
2025-02-19drm/amdgpu: Add JPEG4_0_3 core reset control regSathishkumar S1-0/+34
2025-02-17drm/amd/include: Add amd cper headerHawking Zhang1-0/+269
2025-02-13drm/amd/include : Update MES v12 API for fence updateShaoyun Liu1-1/+39
2025-02-13drm/amdgpu: Set snoop bit for SDMA for MI seriesHarish Kasiviswanathan2-0/+80
2025-02-13drm/amd/display: Add dcn36 register header filesWayne Lin2-0/+77425
2025-02-13drm/amd/include : MES v11 and v12 API header updateShaoyun Liu2-1/+4
2025-02-13drm/amdgpu: Add VCN v4.0.3 RRMT register offsetLijo Lazar1-1/+2
2025-01-24drm/amd/display: fix SUBVP DC_DEBUG_MASK documentationAlex Deucher1-1/+1
2025-01-24drm/amd/display: fix CEC DC_DEBUG_MASK documentationAlex Deucher1-1/+1
2025-01-24drm/amdgpu: cache gpu pcie link widthAlex Deucher1-0/+18
2025-01-24drm/amd: Add debug option to disable subvpAurabindo Pillai1-0/+5
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