index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.12.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
pinetabv-6.6.y-devel
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starfive-6.6.63-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
gpu
/
drm
/
amd
/
include
/
asic_reg
/
dpcs
Age
Commit message (
Expand
)
Author
Files
Lines
2024-04-27
drm/amd/display: Add missing debug registers for DCN2/3/3.1
Rodrigo Siqueira
2
-1
/
+27
2024-04-10
drm/amd/display: Add missing registers
Rodrigo Siqueira
2
-1
/
+13
2022-07-14
drm/amdgpu: Add reg headers for DCN314
Roman Li
2
-0
/
+62409
2022-07-13
drm/amdgpu: fix file permissions on some files
Alex Deucher
2
-0
/
+0
2022-02-18
drm/amd/include: add DCN 3.1.5 registers
Qingqing Zhuo
2
-0
/
+115590
2022-02-17
drm/amd/include: Add register headers for DCN 3.1.6
Leo Li
2
-0
/
+148110
2022-02-08
drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcs
Alex Deucher
2
-0
/
+1396
2022-02-08
drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcs
Alex Deucher
2
-0
/
+4152
2021-09-30
drm/amdgpu: add cyan_skillfish asic header files
Zhan Liu
2
-0
/
+1103
2021-09-23
drm/amd/display: Fix B0 USB-C DP Alt mode
Liu, Zhan
1
-0
/
+27
2021-06-04
drm/amdgpu: add yellow carp asic header files (v3)
Aaron Liu
2
-0
/
+115321
2019-12-19
drm/amdgpu: add dpcs20 registers
Roman Li
2
-0
/
+4559
2019-12-19
drm/amdgpu: move dpcs headers to dpcs includes
Roman Li
2
-0
/
+3995