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path: root/drivers/gpu/drm/amd/display/dc/inc
AgeCommit message (Expand)AuthorFilesLines
2020-08-06drm/amd/display: Fix logger contextHarry Wentland1-1/+2
2020-08-06drm/amd/display: Allow asic specific FSFT timing optimizationReza Amini1-0/+5
2020-08-06drm/amd/display: Rename bytes_pp to the correct bits_ppEryk Brol1-1/+1
2020-07-21drm/amd/display: Make new dc interface for adding dsc resourceAurabindo Pillai1-1/+3
2020-07-21drm/amd/display: Add DSC parameters logging to debugfsEryk Brol1-0/+5
2020-07-14drm/amd/display: reduce sr_xxx_time by 3 us when ppt disableChiawen Huang1-0/+1
2020-07-14drm/amd/display: Power down hardware if set mode is not called before timeoutSung Lee1-0/+1
2020-07-08drm/amd/display: Request PHYCLK adjustment on PHY enable/disableJoshua Aberback2-0/+5
2020-07-02drm/amd/display: Preserve gpu memory allocation for life of dcJoshua Aberback1-0/+2
2020-07-01drm/amd/display: DP link layer test 4.2.1.1 fix due to specs updateWenjing Liu2-2/+2
2020-07-01drm/amd/display: make calculate watermarks a function pointerDmytro Laktyushkin1-1/+5
2020-07-01drm/amd/display: Add helper to convert DC statusRodrigo Siqueira1-0/+2
2020-07-01drm/amd/display: add support for per-state dummy-pstate latencyJun Lei1-0/+6
2020-07-01drm/amd/display: Revert "DP link layer test 4.2.1.1 fix due to specs update"Wenjing Liu2-2/+2
2020-07-01drm/amd/display: Add DCN3 ResourceBhawanpreet Lakha3-0/+33
2020-07-01drm/amd/display: Add DCN3 HWSEQBhawanpreet Lakha3-0/+13
2020-07-01drm/amd/display: Add DCN3 DWBBhawanpreet Lakha1-0/+83
2020-07-01drm/amd/display: Add DCN3 MMHUBHUBBhawanpreet Lakha1-0/+3
2020-07-01drm/amd/display: Add DCN3 HUBPBhawanpreet Lakha1-0/+4
2020-07-01drm/amd/display: Add DCN3 HUBHUBBhawanpreet Lakha1-0/+6
2020-07-01drm/amd/display: Add DCN3 DPPBhawanpreet Lakha1-0/+7
2020-07-01drm/amd/display: Add DCN3 MPCBhawanpreet Lakha1-0/+108
2020-07-01drm/amd/display: Add DCN3 OPTCBhawanpreet Lakha1-0/+19
2020-07-01drm/amd/display: Add DCN3 CLK_MGRBhawanpreet Lakha2-0/+83
2020-07-01drm/amd/display: Add DCN3 DIOBhawanpreet Lakha1-0/+4
2020-05-28drm/amd/display: Remove nv12 work aroundYongqiang Sun1-3/+0
2020-05-28drm/amd/display: DP link layer test 4.2.1.1 fix due to specs updateWenjing Liu2-2/+2
2020-05-28drm/amd/display: Implement some asic specific abm call backs.Yongqiang Sun1-0/+2
2020-05-21drm/amd/display: Defer cursor lock until after VUPDATENicholas Kazlauskas1-0/+5
2020-05-21drm/amd/display: fix and simplify pipe split logicDmytro Laktyushkin1-0/+2
2020-05-05drm/amd/display: Mode change with same timing causing long display blankAric Cyr1-3/+0
2020-05-05drm/amd/display: Move panel_cntl specific register from abm to panel_cntl.Yongqiang Sun3-14/+19
2020-04-28drm/amd/display: Use cursor locking to prevent flip delaysAric Cyr2-0/+17
2020-04-28drm/amd/display: Add set backlight to hw sequencer.Yongqiang Sun1-0/+4
2020-04-28drm/amd/display: Add panel cntl id for set backlight level.Yongqiang Sun1-2/+3
2020-04-23drm/amd/display: change from panel to panel cntlAnthony Koo2-15/+15
2020-04-23drm/amd/display: move panel power seq to new panel structAnthony Koo3-2/+56
2020-04-23drm/amd/display: add optc get crc support for timings with ODM/DSCWenjing Liu1-0/+3
2020-04-23drm/amd/display: Add SetBacklight call to abm on dmcubWyatt Wood1-1/+1
2020-04-23drm/amd/display: Force watermark value propagationJoshua Aberback1-0/+2
2020-04-09drm/amd/display: fix dml pipe merge logicDmytro Laktyushkin1-0/+2
2020-04-09drm/amd/display: Power down hw blocks on bootSung Lee1-0/+4
2020-04-09drm/amd/display: Implement abm config table copy to dmcubWyatt Wood1-2/+1
2020-04-01drm/amd/display: Add ABM driver implementationWyatt Wood1-0/+4
2020-03-19drm/amd/display: DPP DTO isn't update properly.Yongqiang Sun1-1/+2
2020-03-19drm/amd/display: Remove connect DIG FE to its BE during timing programmingNikola Cornij1-1/+0
2020-03-19drm/amd/display: workaround for HDMI hotplug in DPMSOFF stateYongqiang Sun1-0/+2
2020-03-09drm/amd/display: Program DSC during timing programmingNikola Cornij1-0/+1
2020-03-05drm/amd/display: fix image corruption with ODM 2:1 DSC 2 sliceWenjing Liu1-0/+1
2020-03-05drm/amd/display: program DPG_OFFSET_SEGMENT for odm_pipeWenjing Liu1-1/+2
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-01 22:34:35 +0300