index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
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log msg
author
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range
path:
root
/
drivers
/
gpu
/
drm
/
amd
/
display
/
dc
/
inc
/
dcn_calcs.h
Age
Commit message (
Expand
)
Author
Files
Lines
2019-05-31
drm/amd/display: make clk mgr soc specific
Eric Yang
1
-1
/
+1
2019-04-15
drm/amd/display: Add fast_validate parameter
Joshua Aberback
1
-1
/
+2
2019-03-28
drm/amd/display: Populate macro_tile_size field for dml
Joshua Aberback
1
-0
/
+2
2018-11-05
drm/amd/display: rename dccg to clk_mgr
Dmytro Laktyushkin
1
-1
/
+1
2018-11-05
drm/amd/display: split dccg clock manager into asic folders
Dmytro Laktyushkin
1
-1
/
+1
2018-09-27
drm/amd/display: program v_update and v_ready with proper field
Su Sung Chung
1
-3
/
+3
2018-07-06
drm/amd/display: replace clocks_value struct with dc_clocks
Dmytro Laktyushkin
1
-1
/
+1
2017-12-20
drm/amd/display: fix global sync param retrieval when not pipe splitting
Dmytro Laktyushkin
1
-3
/
+3
2017-09-27
drm/amd/display: Rename dc validate_context and current_context
Jerry Zuo
1
-2
/
+2
2017-09-27
drm/amd/display: Flattening core_dc to dc
Bhawanpreet Lakha
1
-6
/
+6
2017-09-27
drm/amd/display: fix PHYCLK in formula.
Charlene Liu
1
-0
/
+5
2017-09-27
drm/amd/display: block modes that require read bw greater than 30%
Eric Yang
1
-0
/
+1
2017-09-27
drm/amdgpu/display: Add calcs code for DCN
Harry Wentland
1
-0
/
+629