summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/dce100
AgeCommit message (Expand)AuthorFilesLines
2018-10-10drm/amd/display: fix memory leak in resource poolsJun Lei1-0/+2
2018-10-10drm/amd/display: clean up encoding checksEric Yang1-2/+1
2018-09-11drm/amd/display: num of sw i2c/aux engines less than num of connectorsHersen Wu1-1/+5
2018-08-27drm/amd/display: Create new i2c resourceDavid Francis1-1/+50
2018-08-06drm/amd/display: Don't share clk source between DP and HDMIMikita Lipski1-1/+1
2018-07-27drm/amd/display: flatten aux_engine and engineBhawanpreet Lakha1-2/+2
2018-07-24drm/amd/display: Decouple aux from i2cBhawanpreet Lakha1-0/+42
2018-07-24drm/amd/display: On dce100, set clocks to 0 on suspendDavid Francis1-3/+16
2018-07-24drm/amd/display: Remove unnecessary warningMikita Lipski1-4/+0
2018-07-06drm/amd/display: rename dce_disp_clk to dccgDmytro Laktyushkin1-3/+3
2018-07-06drm/amd/display: rename display clock block to dccgDmytro Laktyushkin2-7/+7
2018-07-06drm/amd/display: redesign dce/dcn clock voltage update requestDmytro Laktyushkin1-6/+43
2018-04-11drm/amd/display: drop dc_validate_guaranteedJulian Parkin1-33/+0
2018-03-14drm/amd/display: Enable backlight support for pre-DCE11 ASICsMikita Lipski1-0/+50
2018-02-19drm/amd/display: Re-use DCE100 display_power_gating for DCE80Harry Wentland2-1/+5
2018-02-19drm/amd/display: Add timing generator count to resource pool.Yongqiang Sun1-0/+1
2018-02-19drm/amd/display: Don't allow dual-link DVI on all ASICs.Harry Wentland1-0/+1
2017-12-19BackMerge tag 'v4.15-rc4' into drm-nextDave Airlie3-1/+45
2017-12-06drm/amd/display: send display_count msg so SMU can enter S0i2Hersen Wu1-0/+2
2017-12-04drm/amdgpu: add license to files where it was missingAlex Deucher2-1/+24
2017-12-04drm/amdgpu: add license to MakefilesAlex Deucher1-0/+21
2017-10-21drm/amd/display: add max_video_width cap to dcDmytro Laktyushkin2-2/+2
2017-09-29amdgpu/dc: remove pointless return from build_pipe_hw_paramDave Airlie1-5/+1
2017-09-29amdgpu/dc: another round of dce/dcn construct cleanups.Dave Airlie3-7/+3
2017-09-29amdgpu/dc: make dce transform constructor voidDave Airlie1-8/+3
2017-09-29amdgpu/dc: make opp construct void.Dave Airlie1-7/+3
2017-09-29amdgpu/dc: make link encoder construct void.Dave Airlie1-14/+7
2017-09-29amdgpu/dc: make stream encoder constructor return void.Dave Airlie1-8/+3
2017-09-29amdgpu/dc: make timing generator constructor return void.Dave Airlie1-7/+2
2017-09-28drm/amd/display: Use kernel alloc/freeHarry Wentland1-21/+22
2017-09-27drm/amd/display: Set add_stream_ctx for CZ, Hawaii and othersHarry Wentland2-0/+24
2017-09-27drm/amd/display: Rename dc validate_context and current_contextJerry Zuo3-11/+11
2017-09-27drm/amd/display: Per plane validation context build.Andrey Grodzovsky1-10/+6
2017-09-27drm/amd/display: Per stream validate_context build v2.Andrey Grodzovsky1-62/+16
2017-09-27drm/amd/display: Flattening core_dc to dcBhawanpreet Lakha4-21/+20
2017-09-27drm/amd/display: do not report min_memory_clock_khz to pplib for dce8 & 10Dmytro Laktyushkin1-2/+2
2017-09-27drm/amd/display: Rename more dc_surface stuff to plane_stateHarry Wentland1-4/+4
2017-09-27drm/amd/display: Rename dc_stream to dc_stream_stateHarry Wentland1-2/+2
2017-09-27drm/amd/display: Rename dc_surface to dc_plane_stateHarry Wentland2-4/+4
2017-09-27drm/amd/display: Add per surface validation hook.Andrey Grodzovsky2-1/+13
2017-09-27drm/amd/display: Rename firmware_info to dc_firmware_infoHarry Wentland1-1/+1
2017-09-27drm/amd/display: Roll core_stream into dc_streamLeo (Sunpeng) Li1-6/+6
2017-09-27drm/amd/display: Move stream validations into seperate function.Andrey Grodzovsky1-21/+3
2017-09-27drm/amd/display: Roll core_link into dc_linkHarry Wentland1-1/+1
2017-09-27drm/amd/display: make dc_get_validate_context re-entrantDmytro Laktyushkin1-10/+12
2017-09-27drm/amd/display: dce 8 - 12 mem_input refactor to new styleDmytro Laktyushkin1-67/+11
2017-09-27drm/amd/display: refactor bw related variable structure in val_ctxDmytro Laktyushkin2-7/+6
2017-09-27drm/amd/display: decouple resource_pool from resource_contextTony Cheng2-8/+4
2017-09-27drm/amd/display: dce80, 100, 110 and 112 to dce ipp refactorDmytro Laktyushkin1-40/+33
2017-09-27drm/amd/display: update dce8 & 10 bw programmingDmytro Laktyushkin3-17/+19
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-06 11:52:47 +0300