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path: root/drivers/gpu/drm/amd/display/dc/clk_mgr
AgeCommit message (Expand)AuthorFilesLines
2022-09-19drm/amd/display: fix dcn315 memory channel count and width readDmytro Laktyushkin1-2/+1
2022-09-13drm/amd/display: Correct dram channel width for dcn314Duncan Ma1-0/+2
2022-08-25drm/amd/display: Adding log clock table from SMULeo Chen3-0/+140
2022-08-22drm/amd/display: remove unneeded semicolonYang Li1-1/+1
2022-08-17drm/amd/display: Unneeded semicolonmin tang1-1/+1
2022-08-17drm/amd/display: Update clock table policy for DCN314Nicholas Kazlauskas2-65/+154
2022-08-17drm/amd/display: Add debug parameter to retain default clock tableDaniel Miess1-1/+1
2022-08-10drm/amd/display: Correct DTBCLK for dcn314Duncan Ma2-12/+2
2022-08-10drm/amd/display: change family id name for DCN314Yifan Zhang1-2/+2
2022-08-10drm/amd/display: remove header from source fileMagali Lemes2-2/+2
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong1-1/+2
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong1-1/+2
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong1-1/+2
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong1-2/+2
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong1-1/+2
2022-07-25drm/amd/display: move FPU code from dcn301 clk mgr to DML folderMelissa Wen3-85/+9
2022-07-25drm/amd/display: move FPU code from dcn30 clk mgr to DML folderMelissa Wen2-64/+5
2022-07-25drm/amd/display: move FPU code on dcn21 clk_mgrMelissa Wen3-236/+11
2022-07-25drm/amd/display: Drop FPU flags from dcn32_clk_mgrRodrigo Siqueira2-102/+4
2022-07-14drm/amd/display: Enable DCN314 in DCRoman Li2-1/+30
2022-07-14drm/amd/display: Add DCN314 clock managerRoman Li4-0/+1278
2022-07-12drm/amd/display: Removing assert statements for LinuxSaaem Rizvi5-9/+30
2022-07-05drm/amd/display: disable otg toggle w/a on bootDmytro Laktyushkin1-2/+5
2022-07-05drm/amd/display: Switch to correct DTO on HDMIChris Park1-0/+2
2022-07-05drm/amd/display: Add SubVP required codeAlvin Lee2-2/+9
2022-07-01drm/amdgpu/display: add missing FP_START/END checks dcn32_clk_mgr.cAlex Deucher1-0/+4
2022-07-01drm/amd/display: Fix __nedf2 undefined for 32 bit compilationRodrigo Siqueira1-4/+7
2022-07-01drm/amd/display: Fix __muldf3 undefined for 32 bit compilationRodrigo Siqueira1-2/+2
2022-06-24drm/amd/display: Fix indentation in dcn32_get_vco_frequency_from_reg()Nathan Chancellor1-1/+1
2022-06-22drm/amd/display: Drop duplicate defineRodrigo Siqueira1-2/+0
2022-06-22drm/amd/display: Update hook dcn32_funcsRodrigo Siqueira1-1/+2
2022-06-22drm/amd/display: Implement a pme workaround functionChaitanya Dhere3-1/+10
2022-06-22drm/amd/display: Get VCO frequency from registersRodrigo Siqueira1-1/+93
2022-06-22drm/amd/display: Update SW state correctly for FCLKAlvin Lee1-3/+3
2022-06-22drm/amd/display: Fix divide-by-zero in DPPCLK and DISPCLK calculationGeorge Shen1-8/+10
2022-06-22drm/amd/display: Update DPPCLK programming sequenceAlvin Lee1-1/+24
2022-06-22drm/amd/display: Check minimum disp_clk and dpp_clk debug optionRodrigo Siqueira1-0/+19
2022-06-22drm/amd/display: Fix DC warning at driver loadQingqing Zhuo1-1/+1
2022-06-22drm/amd/display: Add SMU logging codeSaaem Rizvi5-0/+48
2022-06-15drm/amdgpu/display: make FP handling in Makefiles consistentAlex Deucher1-2/+1
2022-06-15drm/amd/display: DAL ACR, dc part, fix missing dcn30Ian Chen2-8/+25
2022-06-15drm/amd/display: Fix commentsSamson Tam1-1/+0
2022-06-07Revert "drm/amd/display: Pass the new context into disable OTG WA"Nicholas Kazlauskas3-12/+12
2022-06-06drm/amdgpu/display: make some functions staticAlex Deucher1-1/+1
2022-06-03drm/amd/display: Implement DTBCLK ref switching on dcn32Alvin Lee3-15/+91
2022-06-03drm/amd/display: Match dprefclk with clk registersSamson Tam1-3/+6
2022-06-03drm/amd/display: cleaning up smu_if to add future flexibilityMartin Leung3-15/+74
2022-06-03drm/amd/display: FCLK P-state support updatesChaitanya Dhere2-5/+7
2022-06-03drm/amd/display: Introduce new update_clocks logicJun Lei1-52/+73
2022-06-03drm/amd/display: Disable DTB Ref Clock Switching in dcn32Dillon Varone1-0/+4
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