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path: root/drivers/gpu/drm/amd/amdgpu/nv.c
AgeCommit message (Expand)AuthorFilesLines
2020-12-16drm/amdgpu: set mode1 reset as default for dimgrey_cavefishTao Zhou1-0/+1
2020-11-16drm/amdgpu/sriov: reopen sienna_child smu ip block under sriovJane Jian1-1/+1
2020-11-10drm/amdgpu: enable DCN for navi10 headless SKUTianci.Yin1-2/+1
2020-11-05drm/amdgpu: Enable FGCG for VangoghJinzhou.Su1-0/+1
2020-11-02amdgpu: Add mmhub MGCG and MGLS for vangoghJinzhou.Su1-0/+2
2020-10-30amdgpu: Add GFX MGCG and MGLS for vangoghJinzhou.Su1-1/+5
2020-10-30drm/amdgpu: rename nv_is_headless_sku()Flora Cui1-3/+3
2020-10-30drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKUFlora Cui1-2/+3
2020-10-27drm/amdgpu: add vangogh apu flagHuang Rui1-1/+3
2020-10-26drm/amdgpu: enable IP discovery for vangoghXiaomeng Hou1-4/+0
2020-10-23drm/amdgpu: disable DCN and VCN for navi10 blockchain SKU(v3)Tianci.Yin1-2/+12
2020-10-21drm/amdgpu: enable VCN PG and CG for vangoghBoyuan Zhang1-2/+7
2020-10-16drm/amdgpu/display: enable display ip block for vangoghHuang Rui1-0/+4
2020-10-15drm/amdgpu: fulfill Navi gfx and pcie settings on umd pstate switching(V2)Evan Quan1-0/+24
2020-10-12drm/amdgpu: add DM block for dimgrey_cavefishTao Zhou1-0/+4
2020-10-12drm/amdgpu: enable ih CG for dimgrey_cavefishTao Zhou1-1/+2
2020-10-12drm/amdgpu: enable hdp CG and LS for dimgrey_cavefishTao Zhou1-1/+3
2020-10-12drm/amdgpu: add psp and smu block for dimgrey_cavefishTao Zhou1-0/+5
2020-10-12drm/amdgpu: enable jpeg3.0 for dimgrey_cavefishJames Zhu1-0/+1
2020-10-12drm/amdgpu: enable vcn3.0 for dimgrey_cavefishJames Zhu1-0/+1
2020-10-12drm/amdgpu: enable athub/mmhub PG for dimgrey_cavefishTao Zhou1-1/+3
2020-10-12drm/amdgpu: enable mc CG and LS for dimgrey_cavefishTao Zhou1-1/+3
2020-10-12drm/amdgpu: enable GFX clock gating for dimgrey_cavefishTao Zhou1-1/+4
2020-10-12drm/amdgpu: enable jpeg3.0 PG and CG for dimgrey_cavefishJames Zhu1-2/+4
2020-10-12drm/amdgpu: enable VCN3.0 PG and CG for dimgrey_cavefishJames Zhu1-2/+3
2020-10-12drm/amdgpu/vcn: enable VCN DPG mode for dimgrey_cavefishJames Zhu1-1/+1
2020-10-12drm/amdgpu: add virtual display support for dimgrey_cavefishTao Zhou1-0/+2
2020-10-12drm/amdgpu: add sdma ip block for dimgrey_cavefishTao Zhou1-0/+1
2020-10-12drm/amdgpu: add gfx ip block for dimgrey_cavefishTao Zhou1-0/+1
2020-10-12drm/amdgpu: add ih ip block for dimgrey_cavefishTao Zhou1-0/+1
2020-10-12drm/amdgpu: add gmc ip block for dimgrey_cavefishTao Zhou1-0/+1
2020-10-12drm/amdgpu: add common ip block for dimgrey_cavefishTao Zhou1-0/+3
2020-10-12drm/amdgpu: initialize IP offset for dimgrey_cavefishTao Zhou1-0/+3
2020-10-12drm/amdgpu: add common support for dimgrey_cavefishTao Zhou1-0/+6
2020-10-05drm/amdgpu: enable gfx clock gating and power gating for vangoghHuang Rui1-2/+5
2020-10-05drm/amdgpu: IP discovery table is not ready yet for VGAlex Deucher1-0/+4
2020-10-05drm/amdgpu: enable psp support for vangoghHuang Rui1-0/+2
2020-10-05drm/amdgpu: add smu ip block for vangoghHuang Rui1-0/+1
2020-10-05drm/amdgpu: add nbio v7.2 for vangogh (v2)Huang Rui1-2/+8
2020-10-05drm/amdgpu: add pcie port indirect read and write on nvHuang Rui1-0/+32
2020-10-05drm/amdgpu: enable vcn3.0 for van goghThong Thai1-0/+2
2020-10-05drm/amdgpu: set ip blocks for van goghHuang Rui1-0/+9
2020-10-05drm/amdgpu: skip sdma1 in nv_allowed_read_registers list for van gogh (v2)Huang Rui1-1/+2
2020-10-05drm/amdgpu: add nv common ip block support for van goghHuang Rui1-0/+8
2020-10-01drm/amdgpu: switch to indirect reg access helperHawking Zhang1-43/+8
2020-09-23drm/amdgpu: fix hdp register access errorStanley.Yang1-1/+1
2020-09-16drm/amdgpu: Fix consecutive DPC recovery failures.Andrey Grodzovsky1-2/+2
2020-08-26drm/amdgpu: use MODE1 reset for navy_flounder by defaultJiansong Chen1-0/+1
2020-08-26drm/amdgpu: add pre_asic_init callback for naviAlex Deucher1-0/+5
2020-08-15drm/amdgpu: note what type of reset we are usingAlex Deucher1-2/+4
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