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path: root/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
AgeCommit message (Expand)AuthorFilesLines
2022-04-06drm/amdgpu: fix incorrect GCR_GENERAL_CNTL addressRuili Ji1-3/+3
2022-03-25drm/amdgpu/gfx10: enable gfx1037 clock counter retrieval functionPrike Liang1-0/+1
2022-03-15drm/amdgpu: only allow secure submission on rings which support thatLang Yu1-0/+1
2022-03-03drm/amdgpu/gfx10: drop unused cyan skillfish firmwareAlex Deucher1-11/+1
2022-03-03drm/amdgpu: enable gfxoff routine for GC 10.3.7Prike Liang1-0/+3
2022-03-03drm/amdgpu: enable gfx power gating for GC 10.3.7Prike Liang1-0/+2
2022-03-03drm/amdgpu: enable gfx clock gating control for GC 10.3.7Prike Liang1-0/+1
2022-02-17drm/amdgpu: add gc 10.3.6 supportYifan Zhang1-3/+84
2022-02-17drm/amdgpu/gfx10: Add GC 10.3.7 SupportPrike Liang1-1/+52
2022-02-17drm/amdgpu: make cyan skillfish support code more consistentAlex Deucher1-3/+1
2022-02-12drm/amdgpu: add support for GC 10.1.4Lang Yu1-0/+9
2022-02-10drm/amdgpu: fix gmc init fail in sriov modeYang Wang1-1/+3
2022-01-26drm/amdgpu: retire rlc callbacks sriov_rreg/wregHawking Zhang1-114/+0
2022-01-26drm/amdgpu: init rlcg_reg_access_ctrl for gfx10Hawking Zhang1-4/+34
2022-01-26drm/amdgpu: switch to get_rlcg_reg_access_flag for gfx10Hawking Zhang1-39/+2
2021-11-24drm/amdgpu/gfx10: add wraparound gpu counter check for APUs as wellAlex Deucher1-2/+13
2021-11-05drm/amdgpu: correctly toggle gfx on/off around RLC_SPM_* register accessEvan Quan1-0/+5
2021-11-03drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us for yellow carpAaron Liu1-4/+1
2021-10-22drm/amdgpu: remove grbm cam index/data operations for gfx v10Huang Rui1-22/+0
2021-10-20drm/amdgpu/gfx10: fix typo in gfx_v10_0_update_gfx_clock_gating()Alex Deucher1-2/+3
2021-10-04drm/amdgpu: convert IP version array to include instancesAlex Deucher1-40/+40
2021-10-04drm/amdgpu/gfx10: convert to IP version checkingAlex Deucher1-190/+190
2021-08-06drm/amdgpu: Put MODE register in wave debug infoJoseph Greathouse1-0/+1
2021-07-29drm/amdgpu: remove the access of xxx_PSP_DEBUG on cycan_skillfishHuang Rui1-2/+0
2021-07-23drm/amdgpu: Change the imprecise outputRoy Sun1-3/+3
2021-07-23drm/amdgpu: add autoload_supported check for RLC autoloadLang Yu1-1/+2
2021-07-23drm/amdgpu: add gc v10 golden settings for cyan_skillfishTao Zhou1-0/+47
2021-07-23drm/amdgpu: add cyan_skillfish support in gfx v10Tao Zhou1-0/+14
2021-07-23drm/amdgpu: add cp/rlc fw loading support for cyan_skillfishTao Zhou1-0/+39
2021-07-23drm/amd/amdgpu: add consistent PSP FW loading size checkingCandice Li1-2/+2
2021-07-23drm/amdgpu: Add error message when programing registers failsRoy Sun1-4/+22
2021-07-23drm/amdgpu: Change the imprecise function nameRoy Sun1-4/+4
2021-07-16drm/amdgpu: update gc golden setting for dimgrey_cavefishTao Zhou1-0/+1
2021-07-16drm/amdgpu: update golden setting for sienna_cichlidLikun Gao1-0/+1
2021-07-16drm/amdgpu: update the golden setting for vangoghXiaojian Du1-0/+1
2021-07-08drm/amdgpu: Read clock counter via MMIO to reduce delay (v5)YuBiao Wang1-7/+14
2021-06-30drm/amdgpu: update GFX MGCG settingsEvan Quan1-4/+7
2021-06-30drm/amdgpu: correct clock gating settings on feature unsupportedEvan Quan1-15/+54
2021-06-30drm/amdgpu: fix Navi1x tcp power gating hang when issuing lightweight invalid...Evan Quan1-0/+95
2021-06-30drm/amdgpu: correct tcp harvest settingEvan Quan1-46/+51
2021-06-22Revert "drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full d...Yifan Zhang1-5/+1
2021-06-16drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full doorbell.Yifan Zhang1-1/+5
2021-06-04drm/amdgpu: correct the cu and rb info for yellow carpXiaomeng Hou1-2/+4
2021-06-04drm/amdgpu: add timestamp counter query support for yellow carpAaron Liu1-0/+1
2021-06-04drm/amdgpu: add RLC_PG_DELAY_3 for yellow carpAaron Liu1-5/+16
2021-06-04drm/amdgpu: add gfx golden settings for yellow carp (v3)Aaron Liu1-0/+29
2021-06-04drm/amdgpu: add gfx support for yellow carpAaron Liu1-0/+26
2021-06-04drm/amdgpu: Enable RLCG read/write interface for Sienna CichlidRohit Khaire1-1/+1
2021-06-04drm/amdgpu: Fix incorrect register offsets for Sienna CichlidRohit Khaire1-5/+21
2021-06-03Merge tag 'amd-drm-next-5.14-2021-06-02' of https://gitlab.freedesktop.org/ag...Dave Airlie1-61/+56
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