index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
fpga
/
altera-cvp.c
Age
Commit message (
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)
Author
Files
Lines
2019-08-24
fpga: altera-cvp: Add Stratix10 (V2) Support
Thor Thayer
1
-14
/
+173
2019-08-24
fpga: altera-cvp: Preparation for V2 parts.
Thor Thayer
1
-26
/
+43
2019-08-24
fpga: altera-cvp: Discover Vendor Specific offset
Thor Thayer
1
-37
/
+58
2019-07-25
fpga: altera-cvp: Fix function definition argument
Carlos A Petry
1
-1
/
+2
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285
Thomas Gleixner
1
-9
/
+1
2018-11-26
fpga: altera-cvp: fix probing for multiple FPGAs on the bus
Anatolij Gustschin
1
-10
/
+24
2018-11-11
fpga: altera-cvp: Fix registration for CvP incapable devices
Andreas Puhm
1
-0
/
+9
2018-11-11
fpga: altera-cvp: fix 'bad IO access' on x86_64
Anatolij Gustschin
1
-2
/
+4
2018-10-16
fpga: mgr: add devm_fpga_mgr_create
Alan Tull
1
-5
/
+3
2018-07-07
fpga: altera-cvp: Fix an error handling path in 'altera_cvp_probe()'
Christophe Jaillet
1
-2
/
+4
2018-05-25
fpga: manager: change api, don't use drvdata
Alan Tull
1
-5
/
+14
2018-03-14
PCI: Add Altera vendor ID
Johannes Thumshirn
1
-2
/
+0
2017-09-19
fpga: altera-cvp: remove DRIVER_ATTR() usage
Greg Kroah-Hartman
1
-3
/
+3
2017-07-17
fpga manager: Add Altera CvP driver
Anatolij Gustschin
1
-0
/
+500