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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
dma
/
hsu
Age
Commit message (
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Author
Files
Lines
2019-07-17
Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Linus Torvalds
1
-2
/
+2
2019-06-25
dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
Andy Shevchenko
1
-2
/
+2
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
3
-12
/
+3
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
2
-0
/
+2
2018-10-07
dmaengine: hsu: remove dma_slave_config direction usage
Vinod Koul
1
-4
/
+0
2018-07-10
dmaengine: hsu: Support dmaengine_terminate_sync()
Andy Shevchenko
1
-0
/
+8
2017-01-19
serial: 8250_mid: handle interrupt correctly in DMA case
Andy Shevchenko
1
-2
/
+15
2016-11-25
dmaengine: hsu: pci: switch to new API for IRQ allocation
Andy Shevchenko
1
-3
/
+5
2016-09-02
dmaengine: hsu: refactor hsu_dma_do_irq() to return int
Andy Shevchenko
2
-8
/
+7
2016-06-26
dmaengine: hsu: Export hsu_dma_get_status()
Chuah, Kim Tatt
2
-23
/
+78
2016-05-19
Merge tag 'dmaengine-4.7-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Linus Torvalds
2
-3
/
+9
2016-04-04
dmaengine: hsu: set maximum allowed segment size for DMA
Andy Shevchenko
2
-0
/
+6
2016-04-04
dmaengine: hsu: don't check direction of timeouted channel
Andy Shevchenko
1
-1
/
+1
2016-04-04
dmaengine: hsu: allow more than 3 descriptors
Andy Shevchenko
1
-2
/
+2
2016-04-04
dmaengine: hsu: correct use of channel status register
Andy Shevchenko
2
-1
/
+4
2016-04-04
dmaengine: hsu: correct residue calculation of active descriptor
Andy Shevchenko
1
-2
/
+5
2016-04-04
dmaengine: hsu: set HSU_CH_MTSR to memory width
Andy Shevchenko
1
-2
/
+2
2015-12-05
dmaengine: hsu: speed up residue calculation
Andy Shevchenko
2
-13
/
+5
2015-10-18
dmaengine: hsu: remove platform data
Heikki Krogerus
3
-18
/
+9
2015-10-18
dmaengine: hsu: make the UART driver in control of selecting this driver
Heikki Krogerus
1
-7
/
+2
2015-07-16
dmaengine: hsu: remove excessive lock
Andy Shevchenko
2
-36
/
+4
2015-06-02
dmaengine: hsu: Fix memory leak when stopping a running transfer
Peter Ujfalusi
1
-1
/
+4
2015-04-22
dmaengine: hsu: don't prompt for hsu_core part
Vinod Koul
1
-1
/
+1
2015-03-27
dmaengine: hsu: move memory allocation to GFP_NOWAIT
Andy Shevchenko
1
-2
/
+2
2015-03-27
dmaengine: hsu: remove redundant pieces of code
Andy Shevchenko
1
-11
/
+2
2015-03-27
dmaengine: hsu: add Intel Tangier PCI ID
Andy Shevchenko
1
-0
/
+1
2015-03-07
dmaengine: append hsu DMA driver
Andy Shevchenko
5
-0
/
+764