index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
cxl
/
core
Age
Commit message (
Expand
)
Author
Files
Lines
2022-03-22
cxl/core/port: Fix NULL but dereferenced coccicheck error
Wan Jiabing
1
-1
/
+4
2022-02-18
cxl/port: Hold port reference until decoder release
Dan Williams
1
-0
/
+4
2022-02-18
cxl/port: Fix endpoint refcount leak
Dan Williams
1
-1
/
+2
2022-02-12
cxl/core: Fix cxl_device_lock() class detection
Dan Williams
1
-1
/
+1
2022-02-12
cxl/core/port: Fix unregister_port() lock assertion
Dan Williams
1
-4
/
+20
2022-02-09
cxl/regs: Fix size of CXL Capability Header Register
Jonathan Cameron
1
-2
/
+2
2022-02-09
cxl/core/port: Handle invalid decoders
Dan Williams
1
-6
/
+30
2022-02-09
cxl/core/port: Fix / relax decoder target enumeration
Dan Williams
1
-1
/
+4
2022-02-09
cxl/core/port: Add endpoint decoders
Ben Widawsky
2
-8
/
+63
2022-02-09
cxl/core: Move target_list out of base decoder attributes
Dan Williams
1
-1
/
+2
2022-02-09
cxl/mem: Add the cxl_mem driver
Ben Widawsky
2
-4
/
+117
2022-02-09
cxl/core/port: Add switch port enumeration
Dan Williams
1
-9
/
+418
2022-02-09
cxl/memdev: Add numa_node attribute
Dan Williams
1
-0
/
+17
2022-02-09
cxl/pci: Emit device serial number
Dan Williams
1
-0
/
+11
2022-02-09
cxl/core/port: Remove @host argument for dport + decoder enumeration
Dan Williams
3
-14
/
+14
2022-02-09
cxl/port: Add a driver for 'struct cxl_port' objects
Ben Widawsky
2
-4
/
+32
2022-02-09
cxl/core: Emit modalias for CXL devices
Dan Williams
1
-9
/
+17
2022-02-09
cxl/core/hdm: Add CXL standard decoder enumeration to the core
Dan Williams
5
-15
/
+298
2022-02-09
cxl/core: Generalize dport enumeration in the core
Dan Williams
3
-39
/
+154
2022-02-09
cxl/pci: Rename pci.h to cxlpci.h
Dan Williams
1
-1
/
+1
2022-02-09
cxl/port: Up-level cxl_add_dport() locking requirements to the caller
Dan Williams
1
-2
/
+1
2022-02-09
cxl/pmem: Introduce a find_cxl_root() helper
Dan Williams
2
-4
/
+59
2022-02-09
cxl/port: Introduce cxl_port_to_pci_bus()
Dan Williams
1
-0
/
+37
2022-02-09
cxl/core/port: Use dedicated lock for decoder target list
Dan Williams
1
-7
/
+23
2022-02-09
cxl: Prove CXL locking
Dan Williams
2
-13
/
+38
2022-02-09
cxl/core: Track port depth
Ben Widawsky
1
-0
/
+2
2022-02-09
cxl/core/port: Make passthrough decoder init implicit
Ben Widawsky
1
-1
/
+8
2022-02-09
cxl/core: Fix cxl_probe_component_regs() error message
Dan Williams
1
-1
/
+1
2022-02-09
cxl/core/port: Clarify decoder creation
Ben Widawsky
1
-8
/
+75
2022-02-09
cxl/core: Convert decoder range to resource
Ben Widawsky
1
-2
/
+21
2022-02-09
cxl/decoder: Hide physical address information from non-root
Dan Williams
1
-1
/
+1
2022-02-09
cxl/core/port: Rename bus.c to port.c
Dan Williams
2
-1
/
+1
2022-02-09
cxl/acpi: Map component registers for Root Ports
Ben Widawsky
1
-0
/
+56
2022-01-05
cxl/core: Remove cxld_const_init in cxl_decoder_alloc()
Nathan Chancellor
1
-4
/
+2
2021-11-15
cxl/pmem: Fix module reload vs workqueue state
Dan Williams
1
-1
/
+7
2021-11-15
cxl/core: Convert to EXPORT_SYMBOL_NS_GPL
Dan Williams
6
-29
/
+29
2021-11-15
cxl/memdev: Change cxl_mem to a more descriptive name
Ira Weiny
2
-116
/
+115
2021-11-15
cxl/mbox: Remove bad comment
Ira Weiny
1
-2
/
+0
2021-09-22
cxl/core: Split decoder setup into alloc + add
Dan Williams
3
-93
/
+48
2021-09-22
tools/testing/cxl: Introduce a mock memory device + driver
Dan Williams
1
-3
/
+3
2021-09-22
cxl/mbox: Move command definitions to common location
Dan Williams
1
-39
/
+6
2021-09-22
cxl/bus: Populate the target list at decoder create
Dan Williams
1
-11
/
+69
2021-09-21
cxl/pmem: Add support for multiple nvdimm-bridge objects
Dan Williams
1
-1
/
+31
2021-09-21
cxl/mbox: Add exclusive kernel command support
Dan Williams
2
-0
/
+37
2021-09-21
cxl/mbox: Convert 'enabled_cmds' to DECLARE_BITMAP
Dan Williams
1
-11
/
+1
2021-09-21
cxl/mbox: Move mailbox and other non-PCI specific infrastructure to the core
Dan Williams
5
-9
/
+910
2021-09-21
cxl/pci: Make 'struct cxl_mem' device type generic
Dan Williams
1
-4
/
+3
2021-09-09
Merge tag 'cxl-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...
Linus Torvalds
6
-0
/
+1413
2021-09-07
cxl/registers: Fix Documentation warning
Dan Williams
1
-1
/
+14
2021-09-07
cxl/pmem: Fix Documentation warning
Dan Williams
1
-2
/
+28
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