index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.12.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
pinetabv-6.6.y-devel
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starfive-6.6.63-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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tree
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log msg
author
committer
range
path:
root
/
drivers
/
cxl
/
core
/
regs.c
Age
Commit message (
Expand
)
Author
Files
Lines
2022-12-05
cxl/regs: Fix sparse warning
Dan Williams
1
-1
/
+1
2022-12-05
Merge branch 'for-6.2/cxl-aer' into for-6.2/cxl
Dan Williams
1
-74
/
+98
2022-12-04
cxl/pci: Find and map the RAS Capability Structure
Dan Williams
1
-0
/
+7
2022-12-04
cxl/pci: Prepare for mapping RAS Capability Structure
Dan Williams
1
-10
/
+26
2022-12-04
cxl/core/regs: Make cxl_map_{component, device}_regs() device generic
Dan Williams
1
-17
/
+23
2022-12-04
cxl/pci: Cleanup cxl_map_device_regs()
Dan Williams
1
-31
/
+20
2022-12-04
cxl/pci: Cleanup repeated code in cxl_probe_regs() helpers
Dan Williams
1
-20
/
+26
2022-12-03
cxl/acpi: Extract component registers of restricted hosts from RCRB
Robert Richter
1
-0
/
+65
2022-11-14
cxl/core: Check physical address before mapping it in devm_cxl_iomap_block()
Robert Richter
1
-0
/
+3
2022-11-14
cxl/core: Remove duplicate declaration of devm_cxl_iomap_block()
Robert Richter
1
-0
/
+2
2022-02-09
cxl/regs: Fix size of CXL Capability Header Register
Jonathan Cameron
1
-2
/
+2
2022-02-09
cxl/core/hdm: Add CXL standard decoder enumeration to the core
Dan Williams
1
-3
/
+2
2022-02-09
cxl/pci: Rename pci.h to cxlpci.h
Dan Williams
1
-1
/
+1
2022-02-09
cxl/core: Fix cxl_probe_component_regs() error message
Dan Williams
1
-1
/
+1
2022-02-09
cxl/acpi: Map component registers for Root Ports
Ben Widawsky
1
-0
/
+56
2021-11-15
cxl/core: Convert to EXPORT_SYMBOL_NS_GPL
Dan Williams
1
-4
/
+4
2021-09-07
cxl/registers: Fix Documentation warning
Dan Williams
1
-1
/
+14
2021-08-06
cxl/core: Move register mapping infrastructure
Dan Williams
1
-0
/
+236