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path: root/drivers/clk/zynqmp/divider.c
AgeCommit message (Expand)AuthorFilesLines
2024-01-26drivers: clk: zynqmp: update divider round rate logicJay Buddhabhatti1-61/+5
2022-08-23clk: zynqmp: Add a check for NULL pointerShubhrajyoti Datta1-2/+5
2022-08-23clk: zynqmp: make bestdiv unsignedShubhrajyoti Datta1-1/+1
2022-01-25clk: zynqmp: replace warn_once with pr_debug for failed clock opsMichael Tretter1-6/+6
2021-06-29clk: zynqmp: Handle divider specific read only flagRajan Vaja1-1/+9
2021-06-29clk: zynqmp: Use firmware specific divider clock flagsRajan Vaja1-1/+24
2021-06-29clk: zynqmp: Use firmware specific common clock flagsRajan Vaja1-2/+3
2021-02-11clk: zynqmp: divider: Add missing description for 'max_div'Lee Jones1-0/+1
2020-06-10Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-8/+19
2020-05-27clk: zynqmp: Make zynqmp_clk_get_max_divisor staticYueHaibing1-1/+1
2020-05-27clk: zynqmp: Update fraction clock check from custom type flagsTejas Patel1-2/+4
2020-05-27clk: zynqmp: Fix divider2 calculationTejas Patel1-5/+12
2020-05-27clk: zynqmp: Limit bestdiv with maxdivRajan Vaja1-0/+2
2020-04-28firmware: xilinx: Remove eemi ops for clock_getdividerRajan Vaja1-4/+2
2020-04-28firmware: xilinx: Remove eemi ops for clock_setdividerRajan Vaja1-2/+1
2020-04-28firmware: xilinx: Remove eemi ops for query_dataRajan Vaja1-2/+1
2020-01-24clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flagTejas Patel1-5/+31
2020-01-24clk: zynqmp: Fix divider calculationRajan Vaja1-0/+46
2020-01-24clk: zynqmp: Add support for get max dividerRajan Vaja1-0/+36
2019-04-11clk: zynqmp: fix check for fractional clockMichael Tretter1-3/+6
2019-04-11clk: zynqmp: do not export zynqmp_clk_register_* functionsMichael Tretter1-1/+0
2019-04-11drivers: clk: zynqmp: Allow zero divisor valueRajan Vaja1-0/+7
2018-10-09drivers: clk: Add ZynqMP clock driverJolly Shah1-0/+217
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-06 12:45:31 +0300