Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2022-06-10 | treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE | Thomas Gleixner | 1 | -9/+1 |
2017-03-08 | clk: ti: convert to use proper register definition for all accesses | Tero Kristo | 1 | -40/+21 |
2016-04-16 | clk: ti: dflt: remove redundant unlikely | Suman Anna | 1 | -1/+1 |
2015-10-02 | clk: ti: dflt: fix enable_reg validity check | Suman Anna | 1 | -2/+2 |
2015-08-25 | clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) | Stephen Boyd | 1 | -4/+4 |
2015-06-02 | clk: ti: dflt: move support for default gate clock to clock driver | Tero Kristo | 1 | -0/+316 |