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path: root/drivers/clk/tegra/clk-periph-gate.c
AgeCommit message (Expand)AuthorFilesLines
2021-05-31clk: tegra: Don't deassert reset on enabling clocksDmitry Osipenko1-8/+0
2021-05-31clk: tegra: Fix refcounting of gate clocksDmitry Osipenko1-25/+47
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner1-12/+1
2017-03-20clk: tegra: Fix disable unused for clocks sharing enable bitPeter De Schrijver1-0/+3
2016-04-28clk: tegra: Constify peripheral clock registersThierry Reding1-1/+1
2015-07-20clk: tegra: Properly include clk.hStephen Boyd1-1/+0
2014-07-17ARM: tegra: Move includes to include/soc/tegraThierry Reding1-1/+2
2013-12-12clk: tegra: remove legacy reset APIsStephen Warren1-22/+0
2013-11-26clk: tegra: simplify periph clock dataPeter De Schrijver1-2/+6
2013-04-05clk: tegra: Workaround for Tegra114 MSENC problemPeter De Schrijver1-0/+9
2013-04-05clk: tegra: Fix periph_clk_to_bit macroYen Lin1-1/+1
2013-01-28clk: tegra: add Tegra specific clocksPrashant Gaikwad1-0/+179