Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2024-04-24 | clk: starfive: jh7110: Don't save and restore isp / vout clock registers in s... | Hal Feng | 1 | -0/+15 |
2024-04-19 | Merge branch 'CR_10354_clock_6.6_hal.feng' into 'jh7110-6.6.y-devel' | andy.hu | 1 | -0/+98 |
2024-04-18 | clk: starfive: jh7110: Add sleep pm ops | Hal Feng | 1 | -0/+98 |
2024-04-15 | clk: starfive: jh7110: Change uart3-uart5 clk register info | Hal Feng | 1 | -0/+13 |
2023-07-19 | clk: starfive: Simplify .determine_rate() | Christophe JAILLET | 1 | -8/+2 |
2023-04-05 | clk: starfive: Rename "jh7100" to "jh71x0" for the common code | Emil Renner Berthing | 1 | -141/+141 |
2023-04-05 | clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h | Emil Renner Berthing | 1 | -1/+1 |
2023-04-05 | clk: starfive: Factor out common JH7100 and JH7110 code | Emil Renner Berthing | 1 | -0/+333 |