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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
socfpga
Age
Commit message (
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)
Author
Files
Lines
2023-10-31
Merge branches 'clk-debugfs', 'clk-spreadtrum', 'clk-sifive', 'clk-counted' a...
Stephen Boyd
3
-10
/
+12
2023-10-24
clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock...
Gustavo A. R. Silva
2
-9
/
+9
2023-10-24
clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data
Gustavo A. R. Silva
1
-1
/
+3
2023-10-13
clk: socfpga: gate: Account for the divider in determine_rate
Maxime Ripard
1
-4
/
+23
2023-08-23
clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
Yangtao Li
1
-3
/
+1
2023-07-19
clk: Explicitly include correct DT includes
Rob Herring
2
-4
/
+2
2023-06-09
clk: socfpga: gate: Add a determine_rate hook
Maxime Ripard
1
-0
/
+1
2023-03-22
clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
Marco Pagani
1
-8
/
+22
2023-03-22
clk: socfpga: use of_clk_add_hw_provider and improve error handling
Marco Pagani
1
-10
/
+22
2023-03-22
clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
Marco Pagani
1
-7
/
+19
2023-03-22
clk: socfpga: use of_clk_add_hw_provider and improve error handling
Marco Pagani
1
-13
/
+22
2023-03-22
clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
Marco Pagani
1
-9
/
+13
2023-03-22
clk: socfpga: use of_clk_add_hw_provider and improve error handling
Marco Pagani
1
-6
/
+20
2022-12-14
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
1
-1
/
+4
2022-12-09
clk: socfpga: Fix memory leak in socfpga_gate_init()
Xiu Jianfeng
1
-1
/
+4
2022-12-07
clk: socfpga: remove the setting of clk-phase for sdmmc_clk
Dinh Nguyen
3
-130
/
+0
2022-03-12
clk: cleanup comments
Tom Rix
1
-1
/
+1
2022-03-12
clk: socfpga: cleanup spdx tags
Tom Rix
3
-3
/
+3
2022-01-06
clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_reso...
Cai Huoqing
1
-3
/
+1
2022-01-06
clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_r...
Cai Huoqing
1
-3
/
+1
2022-01-06
clk: socfpga: remove redundant assignment after a mask operation
Colin Ian King
1
-2
/
+2
2022-01-06
clk: socfpga: remove redundant assignment on division
Colin Ian King
1
-1
/
+1
2021-09-25
clk: socfpga: agilex: fix duplicate s2f_user0_clk
Dinh Nguyen
1
-9
/
+0
2021-07-27
clk: socfpga: agilex: add the bypass register for s2f_usr0 clock
Dinh Nguyen
1
-1
/
+1
2021-07-27
clk: socfpga: agilex: fix up s2f_user0_clk representation
Dinh Nguyen
1
-0
/
+9
2021-07-27
clk: socfpga: agilex: fix the parents of the psi_ref_clk
Dinh Nguyen
1
-4
/
+4
2021-06-28
clk: socfpga: clk-pll: Remove unused variable 'rc'
Jian Xin
1
-2
/
+1
2021-06-28
clk: agilex/stratix10/n5x: fix how the bypass_reg is handled
Dinh Nguyen
1
-3
/
+8
2021-06-28
clk: agilex/stratix10: add support for the 2nd bypass
Dinh Nguyen
3
-2
/
+123
2021-06-28
clk: agilex/stratix10: fix bypass representation
Dinh Nguyen
2
-21
/
+91
2021-06-28
clk: agilex/stratix10: remove noc_clk
Dinh Nguyen
2
-34
/
+30
2021-04-29
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
12
-180
/
+202
2021-04-28
Merge branches 'clk-cleanup', 'clk-renesas', 'clk-socfpga', 'clk-allwinner' a...
Stephen Boyd
12
-181
/
+203
2021-04-09
clk: socfpga: fix iomem pointer cast on 64-bit
Krzysztof Kozlowski
1
-1
/
+1
2021-04-08
clk: socfpga: remove redundant initialization of variable div
Colin Ian King
2
-2
/
+2
2021-04-08
clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return
Colin Ian King
1
-0
/
+1
2021-03-31
clk: socfpga: Fix code formatting
Stephen Boyd
1
-1
/
+2
2021-03-31
clk: socfpga: Convert to s10/agilex/n5x to use clk_hw
Dinh Nguyen
6
-147
/
+159
2021-03-31
clk: socfpga: arria10: convert to use clk_hw
Dinh Nguyen
3
-15
/
+16
2021-03-31
clk: socfpga: use clk_hw_register for a5/c5
Dinh Nguyen
3
-15
/
+22
2021-03-29
clk: socfpga: fix iomem pointer cast on 64-bit
Krzysztof Kozlowski
1
-1
/
+1
2021-03-23
clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test)
Krzysztof Kozlowski
2
-3
/
+7
2021-03-23
clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
Krzysztof Kozlowski
1
-3
/
+12
2021-03-23
arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGA
Krzysztof Kozlowski
1
-2
/
+2
2021-03-23
clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers
Krzysztof Kozlowski
2
-7
/
+6
2021-03-23
clk: socfpga: allow building N5X clocks with ARCH_N5X
Krzysztof Kozlowski
2
-2
/
+8
2021-02-17
Merge branches 'clk-socfpga', 'clk-mstar', 'clk-qcom' and 'clk-warnings' into...
Stephen Boyd
6
-7
/
+240
2021-02-13
clk: socfpga: agilex: add clock driver for eASIC N5X platform
Dinh Nguyen
4
-3
/
+238
2021-02-11
clk: socfpga: clk-pll-a10: Remove set but unused variable 'rc'
Lee Jones
1
-2
/
+1
2021-02-11
clk: socfpga: clk-pll: Remove unused variable 'rc'
Lee Jones
1
-2
/
+1
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