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:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
socfpga
/
clk-pll-s10.c
Age
Commit message (
Expand
)
Author
Files
Lines
2022-03-12
clk: socfpga: cleanup spdx tags
Tom Rix
1
-1
/
+1
2022-01-06
clk: socfpga: remove redundant assignment on division
Colin Ian King
1
-1
/
+1
2021-04-08
clk: socfpga: remove redundant initialization of variable div
Colin Ian King
1
-1
/
+1
2021-03-31
clk: socfpga: Convert to s10/agilex/n5x to use clk_hw
Dinh Nguyen
1
-18
/
+25
2021-02-13
clk: socfpga: agilex: add clock driver for eASIC N5X platform
Dinh Nguyen
1
-0
/
+83
2020-05-27
clk: socfpga: agilex: add clock driver for the Agilex platform
Dinh Nguyen
1
-0
/
+68
2020-05-27
clk: socfpga: add const to _ops data structures
Dinh Nguyen
1
-2
/
+2
2020-05-27
clk: socfpga: remove clk_ops enable/disable methods
Dinh Nguyen
1
-2
/
+0
2020-05-27
clk: socfpga: stratix10: use new parent data scheme
Dinh Nguyen
1
-2
/
+2
2020-02-13
clk: socfpga: stratix10: simplify parameter passing
Dinh Nguyen
1
-6
/
+7
2020-02-13
clk: stratix10: use do_div() for 64-bit calculation
Dinh Nguyen
1
-1
/
+3
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
1
-0
/
+1
2019-01-12
clk: socfpga: stratix10: fix rate calculation for pll clocks
Dinh Nguyen
1
-1
/
+1
2018-04-06
clk: socfpga: stratix10: add clock driver for Stratix10 platform
Dinh Nguyen
1
-0
/
+146