starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2024-08-28	clk: rockchip: rk3399: Drop CLK_NR_CLKS CLKPMU_NR_CLKS usage	Johan Jonker	1	-2/+8
2024-02-28	clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent	Ondrej Jirman	1	-3/+3
2023-10-24	clk: Use device_get_match_data()	Rob Herring	1	-7/+2
2023-03-07	clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent	Quentin Schulz	1	-1/+1
2021-11-03	clk: rockchip: drop module parts from rk3399 and rk3568 drivers	Heiko Stuebner	1	-4/+0
2021-11-03	Revert "clk: rockchip: use module_platform_driver_probe"	Heiko Stuebner	1	-1/+1
2021-09-21	clk: rockchip: use module_platform_driver_probe	Miles Chen	1	-1/+1
2021-09-20	clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L}	Brian Norris	1	-2/+2
2021-09-20	clk: rockchip: rk3399: make CPU clocks critical	Brian Norris	1	-4/+7
2021-03-21	clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller	Heiko Stuebner	1	-1/+0
2021-03-21	clk: rockchip: support more core div setting	Elaine Zhang	1	-6/+8
2020-09-22	clk: rockchip: rk3399: Support module build	Elaine Zhang	1	-0/+56
2019-07-17	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-9/+3
2019-06-15	clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macro	Heiko Stuebner	1	-9/+3
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	Thomas Gleixner	1	-10/+1
2019-05-15	clk: Remove io.h from clk-provider.h	Stephen Boyd	1	-0/+1
2018-08-07	clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399	Levin Du	1	-0/+1
2018-07-08	clk: rockchip: fix clk_i2sout parent selection bits on rk3399	Alberto Panizzo	1	-1/+1
2018-03-23	clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399	Lin Huang	1	-2/+2
2018-03-14	clk: rockchip: Add 1.6GHz PLL rate for rk3399	Derek Basehore	1	-0/+1
2017-06-02	clk: rockchip: add ids for rk3399 testclks used for camera handling	Eddie Cai	1	-2/+2
2017-03-06	clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399	Douglas Anderson	1	-4/+4
2017-01-18	clk: rockchip: fix the incorrect pclk_edp div width for RK3399	Xing Zheng	1	-1/+1
2016-11-16	clk: rockchip: fix copy-paste error in rk3399 testclk	Jianqun Xu	1	-2/+2
2016-11-06	clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree	Jianqun Xu	1	-11/+11
2016-11-02	clk: rockchip: optimize 800MHz and 1GHz pll rates on RK3399	Xing Zheng	1	-2/+2
2016-10-21	clk: rockchip: add 533.25MHz to rk3399 clock rates table	Xing Zheng	1	-0/+1
2016-09-07	Merge tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...	Stephen Boyd	1	-15/+41
2016-09-05	clk: rockchip: use the dclk_vop_frac clock ids on rk3399	Yakir Yang	1	-2/+2
2016-09-05	clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers	Douglas Anderson	1	-13/+13
2016-09-04	clk: rockchip: add 2016M to big cpu clk rate table on rk3399	Shunqian Zheng	1	-0/+1
2016-09-04	clk: rockchip: add rk3399 ddr clock support	Lin Huang	1	-0/+19
2016-08-25	clk: rockchip: mark aclk_emmc_noc as a critical clock on rk3399	Xing Zheng	1	-0/+1
2016-08-12	clk: rockchip: fix incorrect GATE bits for {c, g}pll_aclk_perihp_src on rk3399	Xing Zheng	1	-2/+2
2016-08-12	clk: rockchip: fix incorrect aclk_emmc source gate bits on rk3399	Xing Zheng	1	-2/+2
2016-08-12	clk: rockchip: mark rk3399 hdcp_noc and vio_noc as critical	Chris Zhong	1	-0/+4
2016-08-12	clk: rockchip: fix rk3399 aclk_vio gate bit	Chris Zhong	1	-1/+1
2016-08-08	clk: rockchip: delete the CLK_IGNORE_UNUSED from aclk_pcie on rk3399	Elaine Zhang	1	-2/+2
2016-08-08	clk: rockchip: add 65MHz and 106.5MHz rates to rk3399 plls used for HDMI	Xing Zheng	1	-0/+2
2016-07-02	Merge tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...	Stephen Boyd	1	-1/+10
2016-07-01	clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits	Xing Zheng	1	-1/+1
2016-06-03	clk: rockchip: release io resource when failing to init clk on rk3399	Shawn Lin	1	-0/+2
2016-05-30	clk: rockchip: add a dummy clock for the watchdog pclk on rk3399	Xing Zheng	1	-0/+9
2016-05-30	clk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_src	Xing Zheng	1	-2/+2
2016-05-30	clk: rockchip: mark rk3399 GIC clocks as critical	Brian Norris	1	-0/+2
2016-05-08	clk: rockchip: fix the rk3399 sdmmc sample / drv name	Douglas Anderson	1	-2/+2
2016-04-25	clk: rockchip: fix the rk3399 cifout clock	Xing Zheng	1	-5/+6
2016-04-25	clk: rockchip: drop unnecessary CLK_IGNORE_UNUSED flags from rk3399	Xing Zheng	1	-157/+157
2016-04-25	clk: rockchip: add some frequencies on the rk3399 PLL table	Xing Zheng	1	-1/+10
2016-04-25	clk: rockchip: assign more necessary rk3399 clock ids	Xing Zheng	1	-6/+6