| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2016-02-04 | clk: rockchip: convert manually created factor clocks to the new type | Heiko Stuebner | 1 | -25/+6 |
| 2016-02-04 | clk: rockchip: fix parent of hclk_vcodec on rk3036 | Heiko Stuebner | 1 | -1/+1 |
| 2016-01-25 | clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for hclk_vio_bus | Yakir Yang | 1 | -1/+1 |
| 2016-01-03 | Merge branch 'clk-rockchip' into clk-next | Michael Turquette | 1 | -10/+25 |
| 2016-01-03 | clk: rockchip: fix section mismatches with new child-clocks | Heiko Stübner | 1 | -10/+25 |
| 2015-12-24 | Merge branch 'clk-rockchip' into clk-next | Michael Turquette | 1 | -17/+17 |
| 2015-12-23 | clk: rockchip: rk3036: include downstream muxes into fractional dividers | Xing Zheng | 1 | -17/+17 |
| 2015-12-21 | clk: rockchip: only enter pll slow-mode directly before reboots on rk3288 | Heiko Stuebner | 1 | -1/+1 |
| 2015-12-17 | clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for aclk_vio | Yakir Yang | 1 | -1/+1 |
| 2015-11-23 | clk: rockchip: add clock controller for rk3036 | Xing Zheng | 1 | -0/+478 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
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