starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2022-06-25	clk: qcom: mmcc-msm8996: use parent_hws/_data instead of parent_names	Dmitry Baryshkov	1	-239/+495
2022-06-25	clk: qcom: mmcc-msm8996: move clock parent tables down	Dmitry Baryshkov	1	-182/+182
2022-06-25	clk: qcom: mmcc-msm8996: use ARRAY_SIZE instead of specifying num_parents	Dmitry Baryshkov	1	-44/+44
2021-02-14	clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d	AngeloGioacchino Del Regno	1	-11/+18
2020-05-15	clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdsc	Bjorn Andersson	1	-0/+2
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282	Thomas Gleixner	1	-9/+1
2019-02-22	clk: qcom: Make common clk_hw registrations	Jeffrey Hugo	1	-8/+2
2018-08-16	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-2/+0
2018-07-07	clk: qcom: Move frequency table macro to common file	Taniya Das	1	-2/+0
2018-07-06	clk/mmcc-msm8996: Make mmagic_bimc_gdsc ALWAYS_ON	Vivek Gautam	1	-0/+1
2018-06-01	clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always enabled	Rajendra Nayak	1	-11/+11
2017-12-14	clk: qcom: support for alpha pll properties	Abhishek Sahu	1	-0/+16
2017-04-19	clk: qcom: add parent for venus core0 and core1 gdsc's	Stanimir Varbanov	1	-0/+2
2017-04-12	clk: qcom: msm8996: Fix the vfe1 powerdomain name	Rajendra Nayak	1	-1/+1
2016-11-24	clk: qcom: Put venus core0/1 gdscs to hw control mode	Sricharan R	1	-0/+2
2016-11-02	clk: qcom: mmcc-8996: Add gpu gdscs	Rajendra Nayak	1	-0/+24
2016-08-25	clk: qcom: Migrate to clk_hw based registration and OF APIs	Stephen Boyd	1	-5/+4
2016-08-19	clk: qcom: gdsc: Add the missing BIMC gdsc for msm8996	Rajendra Nayak	1	-0/+9
2016-05-13	clk: qcom: mmcc-8996: Remove clocks that should be controlled by RPM	Archit Taneja	1	-32/+0
2016-02-12	clk: qcom: gdsc: Add mmcc gdscs for msm8996 family	Rajendra Nayak	1	-0/+157
2015-12-01	clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver	Stephen Boyd	1	-0/+3217