| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2025-03-04 | clk: qcom: gpucc: Constify 'struct qcom_cc_desc' | Krzysztof Kozlowski | 1 | -1/+1 | |
| 'struct qcom_cc_desc' is passed to qcom_cc_map() and qcom_cc_really_probe() only as pointer to const, so make the memory const for safety. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250228-clk-qcom-const-v1-3-611ab80d45e4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> | |||||
| 2024-12-26 | clk: qcom: Add X1P42100 GPUCC driver | Konrad Dybcio | 1 | -0/+587 | |
| The 8-core X1s have a different GPU subsystem compared to their bigger cousins, including the clocks part. Add the GPU clock controller driver to drive these. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241221-topic-x1p4_clk-v1-3-dbaeccb74884@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> | |||||
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| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
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