index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
nxp
/
clk-lpc32xx.c
Age
Commit message (
Expand
)
Author
Files
Lines
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159
Thomas Gleixner
1
-7
/
+1
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
1
-0
/
+1
2019-01-25
clk: nxp: Drop 'flags' on fixed_rate clk macro
Stephen Boyd
1
-4
/
+3
2018-03-20
clk: lpc32xx: Set name of regmap_config
Jeffy Chen
1
-0
/
+1
2018-01-27
Merge branch 'clk-divider-container' into clk-next
Stephen Boyd
1
-1
/
+1
2017-12-29
clk: divider: fix incorrect usage of container_of
Jerome Brunet
1
-1
/
+1
2017-12-07
clk: lpc32xx: pr_err() strings should end with newlines
Arvind Yadav
1
-2
/
+2
2017-09-01
clk: nxp: clk-lpc32xx: rename clk_gate_is_enabled()
Gabriel Fernandez
1
-6
/
+6
2016-11-02
clk: lpc32xx: add a quirk for PWM and MS clock dividers
Vladimir Zapolskiy
1
-4
/
+28
2016-09-21
clk: nxp: clk-lpc32xx: Unmap region obtained by of_iomap
Arvind Yadav
1
-0
/
+1
2016-07-07
clk: lpc32xx: allow peripheral clock selection in device tree
Sylvain Lemieux
1
-2
/
+1
2016-03-03
clk: lpc32xx: fix compilation warning
Sylvain Lemieux
1
-1
/
+4
2016-02-10
clk: lpc32xx: add HCLK PLL output configuration
Sylvain Lemieux
1
-5
/
+1
2016-02-10
clk: lpc32xx: do not register clock "0"
Sylvain Lemieux
1
-2
/
+2
2015-12-24
clk: lpc32xx: add common clock framework driver
Vladimir Zapolskiy
1
-0
/
+1569