index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
mediatek
/
clk-mtk.c
Age
Commit message (
Expand
)
Author
Files
Lines
2022-02-17
clk: mediatek: gate: Consolidate gate type clk related code
Chen-Yu Tsai
1
-51
/
+0
2022-02-17
clk: mediatek: Use %pe to print errors
Chen-Yu Tsai
1
-12
/
+6
2021-09-15
clk: mediatek: support COMMON_CLK_MEDIATEK module build
Miles Chen
1
-0
/
+8
2021-09-15
clk: mediatek: Fix resource leak in mtk_clk_simple_probe
Chun-Jie Chen
1
-2
/
+10
2021-09-15
clk: mediatek: Add API for clock resource recycle
Chun-Jie Chen
1
-0
/
+9
2021-07-27
clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
Chun-Jie Chen
1
-0
/
+23
2021-07-27
clk: mediatek: Get regmap without syscon compatible check
Chun-Jie Chen
1
-1
/
+1
2019-09-17
clk: mediatek: Register clock gate with device
Weiyi Lu
1
-3
/
+13
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Thomas Gleixner
1
-9
/
+1
2019-03-08
Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk...
Stephen Boyd
1
-2
/
+2
2019-02-26
clk: mediatek: Add flags to mtk_gate
Jasper Mattsson
1
-1
/
+1
2019-02-25
clk: mediatek: add MUX_GATE_FLAGS_2
chunhui dai
1
-1
/
+1
2017-07-22
clk: Convert to using %pOF instead of full_name
Rob Herring
1
-1
/
+1
2016-11-09
clk: mediatek: Add MT2701 clock support
Shunli Wang
1
-0
/
+40
2016-08-19
clk: mediatek: remove __init from clk registration functions
James Liao
1
-6
/
+6
2016-03-03
clk: mediatek: Remove CLK_IS_ROOT
Stephen Boyd
1
-2
/
+2
2016-01-30
clk: mediatek: Fix memory leak on clock init fail
James Liao
1
-2
/
+4
2015-10-01
clk: mediatek: Add fixed clocks support for Mediatek SoC.
James Liao
1
-0
/
+23
2015-10-01
clk: mediatek: Add __initdata and __init for data and functions
James Liao
1
-6
/
+7
2015-05-06
clk: mediatek: Add initial common clock support for Mediatek SoCs.
James Liao
1
-0
/
+220