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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
mediatek
/
clk-gate.c
Age
Commit message (
Expand
)
Author
Files
Lines
2022-09-26
clk: mediatek: gate: Export mtk_clk_register_gates_with_dev
Yassine Oudjana
1
-0
/
+1
2022-05-20
clk: mediatek: Switch to clk_hw provider APIs
Chen-Yu Tsai
1
-18
/
+18
2022-05-20
clk: mediatek: Replace 'struct clk' with 'struct clk_hw'
Chen-Yu Tsai
1
-11
/
+11
2022-02-17
clk: mediatek: Warn if clk IDs are duplicated
Chen-Yu Tsai
1
-1
/
+4
2022-02-17
clk: mediatek: gate: Implement error handling in register API
Chen-Yu Tsai
1
-1
/
+14
2022-02-17
clk: mediatek: gate: Clean up included headers
Chen-Yu Tsai
1
-8
/
+3
2022-02-17
clk: mediatek: gate: Implement unregister API
Chen-Yu Tsai
1
-0
/
+35
2022-02-17
clk: mediatek: gate: Internalize clk implementation
Chen-Yu Tsai
1
-12
/
+23
2022-02-17
clk: mediatek: gate: Consolidate gate type clk related code
Chen-Yu Tsai
1
-1
/
+52
2022-01-07
clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
AngeloGioacchino Del Regno
1
-4
/
+2
2022-01-07
clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
AngeloGioacchino Del Regno
1
-11
/
+7
2021-09-15
clk: mediatek: support COMMON_CLK_MEDIATEK module build
Miles Chen
1
-0
/
+8
2019-09-17
clk: mediatek: Register clock gate with device
Weiyi Lu
1
-2
/
+3
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Thomas Gleixner
1
-9
/
+1
2019-04-12
clk: mediatek: fix clk-gate flag setting
Weiyi Lu
1
-2
/
+1
2019-02-26
clk: mediatek: Add flags to mtk_gate
Jasper Mattsson
1
-1
/
+3
2016-11-09
clk: mediatek: Add MT2701 clock support
Shunli Wang
1
-0
/
+52
2016-08-19
clk: mediatek: remove __init from clk registration functions
James Liao
1
-1
/
+1
2016-01-29
clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
Geliang Tang
1
-4
/
+4
2015-10-01
clk: mediatek: Add __initdata and __init for data and functions
James Liao
1
-1
/
+1
2015-05-20
clk: mediatek: Initialize clk_init_data
Ricky Liang
1
-1
/
+1
2015-05-06
clk: mediatek: Add initial common clock support for Mediatek SoCs.
James Liao
1
-0
/
+137