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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
ingenic
/
jz4740-cgu.c
Age
Commit message (
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)
Author
Files
Lines
2022-05-18
clk: ingenic: Mark critical clocks in Ingenic SoCs
Aidan MacDonald
1
-0
/
+10
2021-11-12
dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
Paul Cercueil
1
-1
/
+1
2021-06-28
clk: Support bypassing dividers
Paul Cercueil
1
-6
/
+6
2020-05-29
clk: Ingenic: Adjust cgu code to make it compatible with X1830.
周琰杰 (Zhou Yanjie)
1
-0
/
+4
2019-09-22
Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Linus Torvalds
1
-0
/
+6
2019-08-12
clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro
Paul Cercueil
1
-1
/
+1
2019-08-09
clk: jz4740: Add TCU clock
Paul Cercueil
1
-0
/
+6
2019-08-08
clk: ingenic/jz4740: Fix "pll half" divider not read/written properly
Paul Cercueil
1
-1
/
+8
2019-07-17
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
1
-78
/
+27
2019-06-26
clk: ingenic: Remove unused functions
Paul Cercueil
1
-73
/
+0
2019-06-26
clk: ingenic: Handle setting the Low-Power Mode bit
Paul Cercueil
1
-0
/
+3
2019-06-07
clk: ingenic/jz4740: Fix incorrect dividers for main clocks
Paul Cercueil
1
-5
/
+24
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Thomas Gleixner
1
-10
/
+1
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
1
-0
/
+1
2019-02-06
clk: ingenic: jz4740: Fix gating of UDC clock
Paul Cercueil
1
-1
/
+1
2018-07-06
clk: ingenic: Add missing flag for UDC clock
Paul Cercueil
1
-1
/
+1
2018-07-06
clk: ingenic: Fix incorrect data for the i2s clock
Paul Cercueil
1
-1
/
+1
2017-11-03
Update MIPS email addresses
Paul Burton
1
-1
/
+1
2016-05-13
clk: ingenic: Allow divider value to be divided
Harvey Hunt
1
-12
/
+12
2015-06-21
MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cgu
Paul Burton
1
-0
/
+37
2015-06-21
MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cgu
Paul Burton
1
-0
/
+22
2015-06-21
MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cgu
Paul Burton
1
-0
/
+22
2015-06-21
MIPS,clk: migrate JZ4740 to common clock framework
Paul Burton
1
-0
/
+222