index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
imx
/
clk-pllv3.c
Age
Commit message (
Expand
)
Author
Files
Lines
2019-07-17
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
1
-5
/
+9
2019-06-07
clk: imx: clk-pllv3: Switch to clk_hw based API
Abel Vesa
1
-5
/
+9
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159
Thomas Gleixner
1
-7
/
+1
2019-05-03
clk: imx: clk-pllv3: mark expected switch fall-throughs
Gustavo A. R. Silva
1
-0
/
+2
2019-04-30
clk: imx: correct i.MX7D AV PLL num/denom offset
Anson Huang
1
-8
/
+21
2017-06-07
clk: imx7d: Fix the DDR PLL enable bit
Fabio Estevam
1
-1
/
+1
2017-06-01
clk: imx7d: Fix the powerdown bit location of PLL DDR
Fabio Estevam
1
-0
/
+5
2017-01-10
clk: imx: pllv3: support fractional multiplier on vf610 PLL1/PLL2
Nikita Yushchenko
1
-0
/
+99
2016-11-02
clk: imx: improve precision of AV PLL to 1 Hz
Emil Lundmark
1
-0
/
+8
2016-11-02
clk: imx: fix integer overflow in AV PLL round rate
Emil Lundmark
1
-2
/
+6
2016-06-16
clk: imx: refine the powerdown bit of clk-pllv3
Dong Aisheng
1
-10
/
+10
2016-06-13
clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bit
Dong Aisheng
1
-4
/
+4
2016-06-12
clk: imx: correct AV PLL rate formula
Anson Huang
1
-2
/
+6
2016-04-27
clk: imx: return correct frequency for Ethernet PLL
Stefan Agner
1
-1
/
+8
2015-11-25
clk: imx: add 'is_prepared' clk_ops callback for pllv3 clk
Bai Ping
1
-0
/
+14
2015-07-20
clk: i.MX: Remove clk.h include
Stephen Boyd
1
-1
/
+0
2015-06-03
ARM: clk: imx: update pllv3 to support imx7
Frank Li
1
-1
/
+8
2015-06-03
ARM: imx: using unsigned variable for do_div
Anson Huang
1
-2
/
+2
2015-06-03
ARM: imx: move clock drivers into drivers/clk
Shawn Guo
1
-0
/
+331