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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
clk-composite.c
Age
Commit message (
Expand
)
Author
Files
Lines
2021-11-04
clk: composite: Fix 'switching' to same clock
Alexander Stein
1
-0
/
+1
2021-11-02
Merge branches 'clk-composite-determine-fix', 'clk-allwinner', 'clk-amlogic' ...
Stephen Boyd
1
-24
/
+52
2021-10-18
clk: composite: Use rate_ops.determine_rate when also a mux is available
Martin Blumenstingl
1
-20
/
+48
2021-10-18
clk: composite: Also consider .determine_rate for rate + mux composites
Martin Blumenstingl
1
-5
/
+5
2021-09-15
clk: composite: export clk_register_composite
Miles Chen
1
-0
/
+1
2020-12-08
clk: composite: add devm_clk_hw_register_composite_pdata()
Michael Walle
1
-0
/
+50
2020-08-22
clk: composite: Export clk_hw_register_composite()
Anson Huang
1
-0
/
+1
2020-01-29
clk: composite: add _register_composite_pdata() variants
Michael Walle
1
-3
/
+53
2019-11-23
clk: Add clk_hw_unregister_composite helper function definition
Manivannan Sadhasivam
1
-0
/
+11
2019-11-23
clk: Zero init clk_init_data in helpers
Manivannan Sadhasivam
1
-1
/
+1
2019-08-16
clk: composite: Drop unused clk.h include
Stephen Boyd
1
-1
/
+0
2019-04-26
clk: Remove CLK_IS_BASIC clk flag
Stephen Boyd
1
-1
/
+1
2018-12-11
clk: Tag basic clk types with SPDX
Stephen Boyd
1
-12
/
+1
2016-04-22
Merge branch 'clk-hw-register' (early part) into clk-next
Stephen Boyd
1
-12
/
+33
2016-04-22
Merge branch 'clk-composite-unregister' into clk-next
Stephen Boyd
1
-0
/
+15
2016-04-22
clk: composite: Add unregister function
Maxime Ripard
1
-0
/
+15
2016-04-20
clk: composite: Add hw based registration APIs
Stephen Boyd
1
-12
/
+33
2016-04-16
clk: Add clk_composite_set_rate_and_parent
Finley Xiao
1
-0
/
+33
2016-01-29
clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
Geliang Tang
1
-2
/
+0
2015-08-25
clk: Convert basic types to clk_hw based provider APIs
Stephen Boyd
1
-7
/
+7
2015-08-25
clk: Convert __clk_get_flags() to clk_hw_get_flags()
Stephen Boyd
1
-1
/
+1
2015-08-25
clk: Replace __clk_get_num_parents with clk_hw_get_num_parents()
Stephen Boyd
1
-1
/
+1
2015-07-28
clk: fix some determine_rate implementations
Boris Brezillon
1
-2
/
+1
2015-07-28
clk: change clk_ops' ->determine_rate() prototype
Boris Brezillon
1
-24
/
+24
2015-05-15
clk: basic-types: Remove useless allocation failure printks
Stephen Boyd
1
-3
/
+1
2015-05-06
clk: make strings in parent name arrays const
Sascha Hauer
1
-1
/
+1
2015-02-18
clk: Replace explicit clk assignment with __clk_hw_set_clk
Javier Martinez Canillas
1
-10
/
+10
2015-02-03
clk: Add rate constraints to clocks
Tomeu Vizoso
1
-2
/
+7
2014-12-04
clk: Change clk_ops->determine_rate to return a clk_hw as the best parent
Tomeu Vizoso
1
-4
/
+5
2014-07-13
clk: composite: improve rate_hw sanity check logic
Mike Turquette
1
-10
/
+16
2014-07-13
clk: composite: allow read-only clocks
Heiko Stübner
1
-6
/
+3
2014-07-13
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->...
Boris BREZILLON
1
-1
/
+47
2014-01-15
clk: composite: pass mux_hw into determine_rate
Mike Turquette
1
-1
/
+1
2013-11-10
clk: composite: .determine_rate support
Emilio López
1
-0
/
+28
2013-04-12
clk: composite: allow fixed rates & fixed dividers
Mike Turquette
1
-4
/
+13
2013-04-12
clk: composite: rename 'div' references to 'rate'
Mike Turquette
1
-20
/
+20
2013-03-26
clk: Add composite clock type
Prashant Gaikwad
1
-0
/
+201