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path: root/drivers/clk/at91/clk-sam9x60-pll.c
AgeCommit message (Expand)AuthorFilesLines
2024-08-07clk: at91: sam9x7: add support for HW PLL freq dividersVarshini Rajendran1-2/+28
2024-08-07clk: at91: clk-sam9x60-pll: re-factor to support individual core freq outputsVarshini Rajendran1-6/+6
2023-06-21clk: at91: clk-sam9x60-pll: add support for parent_hwClaudiu Beznea1-5/+12
2023-03-06clk: at91: clk-sam9x60-pll: fix return value checkClaudiu Beznea1-1/+1
2021-10-27clk: at91: clk-sam9x60-pll: add notifier for div part of PLLClaudiu Beznea1-23/+79
2021-10-27clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULLClaudiu Beznea1-2/+2
2021-10-27clk: at91: re-factor clocks suspend/resumeClaudiu Beznea1-4/+64
2020-12-19clk: at91: clk-sam9x60-pll: allow runtime changes for pllClaudiu Beznea1-18/+127
2020-10-14clk: at91: clk-sam9x60-pll: remove unused variableClaudiu Beznea1-2/+1
2020-07-24clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputsClaudiu Beznea1-173/+374
2020-07-24clk: at91: sam9x60-pll: use frac when setting frequencyClaudiu Beznea1-4/+8
2020-07-24clk: at91: sam9x60-pll: check fcore against rangesClaudiu Beznea1-1/+11
2020-07-24clk: at91: sam9x60-pll: use logical or for range checkClaudiu Beznea1-1/+1
2020-07-24clk: at91: clk-sam9x60-pll: fix mul maskClaudiu Beznea1-1/+1
2020-02-18clk: at91: move sam9x60's PLL register offsets to PMC headerClaudiu Beznea1-54/+37
2020-01-06clk: at91: sam9x60-pll: adapt PMC_PLL_ACR default valueEugen Hristev1-2/+6
2019-04-25clk: at91: add sam9x60 PLL driverAlexandre Belloni1-0/+330