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path: root/drivers/accel/amdxdna/aie2_solver.h
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2024-12-17accel/amdxdna: Enhance power management settingsLizhi Hou1-0/+1
Add SET_STATE ioctl to configure device power mode for aie2 device. Three modes are supported initially. POWER_MODE_DEFAULT: Enable clock gating and set DPM (Dynamic Power Management) level to value which has been set by resource solver or maximum DPM level the device supports. POWER_MODE_HIGH: Enable clock gating and set DPM level to maximum DPM level the device supports. POWER_MODE_TURBO: Disable clock gating and set DPM level to maximum DPM level the device supports. Disabling clock gating means all clocks always run on full speed. And the different clock frequency are used based on DPM level been set. Initially, the driver set the power mode to default mode. Co-developed-by: Narendra Gutta <VenkataNarendraKumar.Gutta@amd.com> Signed-off-by: Narendra Gutta <VenkataNarendraKumar.Gutta@amd.com> Co-developed-by: George Yang <George.Yang@amd.com> Signed-off-by: George Yang <George.Yang@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241213232933.1545388-4-lizhi.hou@amd.com
2024-11-22accel/amdxdna: Add hardware resource solverLizhi Hou1-0/+154
The AI Engine consists of 2D array of tiles arranged as columns. Provides the basic column allocation and release functions for the tile columns. Co-developed-by: Min Ma <min.ma@amd.com> Signed-off-by: Min Ma <min.ma@amd.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-5-lizhi.hou@amd.com