starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2014-11-24	MIPS: ralink: copy the commandline from the devicetree	John Crispin	1	-0/+2
2014-11-24	MIPS: ralink: add a bootrom dumper module	John Crispin	2	-0/+50
2014-11-24	MIPS: ralink: add rt3883 wmac clock	John Crispin	1	-0/+1
2014-11-24	MIPS: ralink: add rt2880 wmac clock	John Crispin	1	-1/+2
2014-11-24	MIPS: ralink: add missing clk_set_rate() to clk.c	John Crispin	1	-0/+6
2014-11-24	MIPS: ralink: allow manual memory override	John Crispin	1	-1/+15
2014-11-24	MIPS: ralink: add illegal access driver	John Crispin	2	-0/+89
2014-11-24	MIPS: ralink: add rt_sysc_m32 helper	John Crispin	1	-0/+7
2014-11-24	MIPS: ralink: add a helper for reading the ECO version	John Crispin	1	-0/+5
2014-11-24	MIPS: ralink: add verbose pmu info	John Crispin	1	-0/+26
2014-11-24	MIPS: lantiq: add missing spi clock on falcon SoC	John Crispin	1	-0/+2
2014-11-24	MIPS: lantiq: the detection of the gpe clock is broken	John Crispin	1	-5/+4
2014-11-24	MIPS: lantiq: copy the commandline from the devicetree	John Crispin	1	-0/+2
2014-11-24	MIPS: lantiq: move eiu init after irq_domain register	John Crispin	1	-24/+24
2014-11-24	MIPS: lantiq: export soc type	John Crispin	2	-0/+7
2014-11-24	MIPS: lantiq: add support for xrx200 firmware depending on soc type	John Crispin	1	-1/+22
2014-11-24	MIPS: lantiq: reboot gphy on restart	John Crispin	1	-1/+8
2014-11-24	MIPS: lantiq: add reset-controller api support	John Crispin	2	-0/+63
2014-11-24	MIPS: lantiq: handle vmmc memory reservation	John Crispin	2	-0/+71
2014-11-24	MIPS: Alchemy: Remove direct access to prepare_count field of struct clk	Tomeu Vizoso	1	-4/+3
2014-11-24	clocksource: mips-gic: Use CPU notifiers to setup the timer	Andrew Bresticker	1	-4/+1
2014-11-24	clocksource: mips-gic: Move gic_frequency to clocksource driver	Andrew Bresticker	1	-0/+2
2014-11-24	clocksource: mips-gic: Combine with GIC clockevent driver	Andrew Bresticker	4	-118/+1
2014-11-24	MIPS: Move GIC clocksource driver to drivers/clocksource/	Andrew Bresticker	4	-40/+3
2014-11-24	MIPS: bcm3384: Initial commit of bcm3384 platform support	Kevin Cernekee	13	-0/+698
2014-11-24	MIPS: Create a helper function for DT setup	Kevin Cernekee	4	-22/+22
2014-11-24	MIPS: BMIPS: Add PRId for BMIPS5200 (Whirlwind)	Kevin Cernekee	2	-0/+2
2014-11-24	MIPS: BMIPS: Add special cache handling in c-r4k.c	Kevin Cernekee	1	-0/+43
2014-11-24	MIPS: BMIPS: Let each platform customize the CPU1 IRQ mask	Kevin Cernekee	2	-2/+5
2014-11-24	MIPS: BMIPS: Select the appropriate L1_CACHE_SHIFT for 438x and 5000 CPUs	Kevin Cernekee	1	-0/+2
2014-11-24	MIPS: Allow MIPS_CPU_SCACHE to be used with different line sizes	Kevin Cernekee	1	-1/+1
2014-11-24	MIPS: BMIPS: Explicitly configure reset vectors prior to secondary boot	Kevin Cernekee	1	-21/+8
2014-11-24	MIPS: BMIPS: Mask off timer IRQs when hot-unplugging a CPU	Jon Fraser	1	-0/+1
2014-11-24	MIPS: BMIPS: Allow BMIPS3300 to utilize SMP ebase relocation code	Jon Fraser	1	-0/+1
2014-11-24	MIPS: BMIPS: Introduce helper function to change the reset vector	Kevin Cernekee	1	-7/+58
2014-11-24	MIPS: BMIPS: Align secondary boot sequence with latest firmware releases	Kevin Cernekee	1	-11/+1
2014-11-24	MIPS: Loongson1B: Add a clockevent/clocksource using PWM Timer	Kelvin Cheung	4	-31/+266
2014-11-24	MIPS: Loongson1B: Some fixes/updates for LS1B	Kelvin Cheung	9	-31/+283
2014-11-24	MIPS: Loongson1B: Improve early printk	Kelvin Cheung	2	-17/+14
2014-11-24	MIPS: Loongson1B: Fix reboot problem on LS1B	Kelvin Cheung	2	-13/+18
2014-11-24	MIPS: DMA: Explain the lack of special handling for R14000/R16000.	Ralf Baechle	1	-0/+5
2014-11-24	MIPS: BCM47XX: Clean up nvram header	Rafał Miłecki	3	-39/+33
2014-11-24	MIPS: BCM47XX: Use mtd as an alternative way/API to get NVRAM content	Rafał Miłecki	1	-4/+38
2014-11-24	MIPS: Kconfig option to better exercise/debug hybrid FPRs	Paul Burton	2	-0/+31
2014-11-24	MIPS: ELF: Set FP mode according to .MIPS.abiflags	Paul Burton	4	-20/+211
2014-11-24	MIPS: ELF: Add definition for the .MIPS.abiflags section	Paul Burton	1	-0/+25
2014-11-24	MIPS: Support for hybrid FPRs	Paul Burton	5	-10/+100
2014-11-24	MIPS: Ensure Config5.UFE is clear on boot	Paul Burton	1	-1/+1
2014-11-24	MIPS: detect presence of the FRE & UFR bits	Paul Burton	3	-0/+7
2014-11-24	MIPS: define bits introduced for hybrid FPRs	Paul Burton	1	-0/+3