index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
xtensa
/
platforms
/
xtfpga
Age
Commit message (
Expand
)
Author
Files
Lines
2014-10-21
xtensa: make PLATFORM_DEFAULT_MEM parameters configurable
Max Filippov
1
-2
/
+2
2014-02-21
xtensa: xtfpga: set ethoc clock frequency
Max Filippov
1
-0
/
+1
2014-02-21
xtensa: xtfpga: use common clock framework
Max Filippov
1
-3
/
+3
2014-01-15
xtensa: xtfpga: fix definitions of platform devices
Max Filippov
1
-6
/
+6
2014-01-15
xtensa: standardize devicetree cpu compatible strings
Baruch Siach
1
-1
/
+1
2014-01-14
xtensa: add SMP support
Max Filippov
1
-1
/
+1
2014-01-14
xtensa: remove NO_IRQ definitions
Max Filippov
1
-4
/
+0
2013-07-08
xtensa: cleanup ccount frequency tracking
Baruch Siach
1
-2
/
+1
2013-06-05
xtensa: xtfpga: fix section mismatch
Baruch Siach
1
-1
/
+1
2013-05-09
xtensa: fix ibreakenable register update
Max Filippov
1
-0
/
+2
2013-02-24
xtensa: rename prom_update_property to of_update_property
Max Filippov
1
-2
/
+2
2012-12-19
xtensa: set the correct ethernet address for xtfpga
Chris Zankel
1
-2
/
+34
2012-12-19
Use for_each_compatible_node() macro.
Wei Yongjun
1
-2
/
+2
2012-12-19
xtensa: add support for the XTFPGA boards
Max Filippov
6
-0
/
+461