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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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/
arch
/
x86
/
lib
/
insn.c
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Commit message (
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Author
Files
Lines
2021-03-15
x86/insn: Make insn_complete() static
Borislav Petkov
1
-0
/
+7
2021-03-15
x86/insn: Add an insn_decode() API
Borislav Petkov
1
-45
/
+171
2021-03-15
x86/insn: Add a __ignore_sync_check__ marker
Borislav Petkov
1
-3
/
+3
2021-03-15
x86/insn: Add @buf_len param to insn_init() kernel-doc comment
Borislav Petkov
1
-0
/
+1
2021-01-14
x86/insn: Fix vector instruction decoding on big endian cross-compiles
Vasily Gorbik
1
-9
/
+9
2021-01-14
x86/insn: Support big endian cross-compiles
Martin Schwidefsky
1
-54
/
+47
2019-10-17
x86: xen: insn: Decode Xen and KVM emulate-prefix signature
Masami Hiramatsu
1
-0
/
+34
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156
Thomas Gleixner
1
-14
/
+1
2016-07-21
x86/insn: Add AVX-512 support to the instruction decoder
Adrian Hunter
1
-3
/
+15
2016-03-03
x86/asm/decoder: Use explicitly signed chars
Josh Poimboeuf
1
-3
/
+3
2015-02-19
x86/asm/decoder: Fix and enforce max instruction size in the insn decoder
Andy Lutomirski
1
-0
/
+7
2015-02-18
x86/asm/decoder: Create artificial 3rd byte for 2-byte VEX
Denys Vlasenko
1
-0
/
+6
2015-01-09
x86: Fix off-by-one in instruction decoder
Peter Zijlstra
1
-1
/
+1
2014-11-18
x86: Remove arbitrary instruction size limit in instruction decoder
Dave Hansen
1
-2
/
+3
2012-10-02
UAPI: x86: Fix insn_sanity build failure after UAPI split
David Howells
1
-0
/
+4
2012-04-16
x86: Handle failures of parsing immediate operands in the instruction decoder
Masami Hiramatsu
1
-17
/
+36
2012-02-11
x86: Fix to decode grouped AVX with VEX pp bits
Masami Hiramatsu
1
-6
/
+7
2011-12-05
x86: Fix instruction decoder to handle grouped AVX instructions
Masami Hiramatsu
1
-1
/
+3
2011-10-10
x86: Fix insn decoder for longer instruction
Masami Hiramatsu
1
-5
/
+43
2009-10-29
x86: AVX instruction set decoder support
Masami Hiramatsu
1
-0
/
+52
2009-10-29
x86: Merge INAT_REXPFX into INAT_PFX_*
Masami Hiramatsu
1
-1
/
+1
2009-08-27
x86: Instruction decoder API
Masami Hiramatsu
1
-0
/
+464