starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2021-05-10	x86/sev-es: Rename sev-es.{ch} to sev.{ch}	Brijesh Singh	1	-525/+0
2021-03-19	x86/sev-es: Replace open-coded hlt-loops with sev_es_terminate()	Joerg Roedel	1	-7/+3
2021-03-18	x86/sev: Do not require Hypervisor CPUID bit for SEV guests	Joerg Roedel	1	-5/+1
2021-01-05	x86/sev-es: Fix SEV-ES OUT/IN immediate opcode vc handling	Peter Gonda	1	-2/+2
2020-10-29	x86/boot/compressed/64: Sanity-check CPUID results in the early #VC handler	Joerg Roedel	1	-0/+26
2020-09-10	x86/sev-es: Check required CPU features for SEV-ES	Martin Radev	1	-0/+15
2020-09-09	x86/sev-es: Handle RDTSC(P) Events	Tom Lendacky	1	-0/+23
2020-09-09	x86/sev-es: Wire up existing #VC exit-code handlers	Joerg Roedel	1	-4/+3
2020-09-09	x86/sev-es: Setup GHCB-based boot #VC handler	Joerg Roedel	1	-7/+7
2020-09-09	x86/sev-es: Compile early handler code into kernel image	Joerg Roedel	1	-10/+11
2020-09-07	x86/sev-es: Add CPUID handling to #VC handler	Tom Lendacky	1	-0/+35
2020-09-07	x86/sev-es: Add support for handling IOIO exceptions	Tom Lendacky	1	-0/+214
2020-09-07	x86/boot/compressed/64: Setup a GHCB-based VC Exception handler	Joerg Roedel	1	-0/+154
2020-09-07	x86/boot/compressed/64: Add stage1 #VC handler	Joerg Roedel	1	-0/+66