starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2018-01-14	x86/pti: Fix !PCID and sanitize defines	Thomas Gleixner	2	-4/+4
2018-01-12	x86/retpoline: Fill return stack buffer on vmexit	David Woodhouse	1	-1/+77
2018-01-12	x86/retpoline/xen: Convert Xen hypercall indirect jumps	David Woodhouse	1	-2/+3
2018-01-12	x86/retpoline/hyperv: Convert assembler indirect jumps	David Woodhouse	1	-8/+10
2018-01-12	x86/spectre: Add boot time option to select Spectre v2 mitigation	David Woodhouse	1	-0/+10
2018-01-12	x86/retpoline: Add initial retpoline support	David Woodhouse	3	-0/+155
2018-01-09	x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSC	Tom Lendacky	1	-0/+1
2018-01-09	x86/cpu/AMD: Make LFENCE a serializing instruction	Tom Lendacky	1	-0/+2
2018-01-06	x86/cpufeatures: Add X86_BUG_SPECTRE_V[12]	David Woodhouse	1	-0/+2
2018-01-05	x86/pti: Rename BUG_CPU_INSECURE to BUG_CPU_MELTDOWN	Thomas Gleixner	1	-1/+1
2018-01-05	x86/alternatives: Add missing '\n' at end of ALTERNATIVE inline asm	David Woodhouse	1	-2/+2
2018-01-05	x86/kaslr: Fix the vaddr_end mess	Thomas Gleixner	1	-1/+7
2018-01-05	x86/mm: Map cpu_entry_area at the same place on 4/5 level	Thomas Gleixner	1	-2/+2
2018-01-05	x86/mm: Set MODULES_END to 0xffffffffff000000	Andrey Ryabinin	1	-1/+1
2018-01-03	x86/dumpstack: Fix partial register dumps	Josh Poimboeuf	1	-4/+13
2017-12-31	x86/mm: Remove preempt_disable/enable() from __native_flush_tlb()	Thomas Gleixner	1	-6/+8
2017-12-23	x86/ldt: Make the LDT mapping RO	Thomas Gleixner	1	-0/+2
2017-12-23	x86/mm/dump_pagetables: Allow dumping current pagetables	Thomas Gleixner	1	-1/+1
2017-12-23	x86/mm/dump_pagetables: Check user space page table for WX pages	Thomas Gleixner	1	-0/+1
2017-12-23	x86/mm: Clarify the whole ASID/kernel PCID/user PCID naming	Peter Zijlstra	1	-12/+43
2017-12-23	x86/mm: Use INVPCID for __native_flush_tlb_single()	Dave Hansen	2	-1/+23
2017-12-23	x86/mm: Use/Fix PCID to optimize user/kernel switches	Peter Zijlstra	3	-13/+90
2017-12-23	x86/mm: Allow flushing for future ASID switches	Dave Hansen	1	-8/+29
2017-12-23	x86/pti: Map the vsyscall page if needed	Andy Lutomirski	1	-0/+1
2017-12-23	x86/pti: Put the LDT in its own PGD if PTI is on	Andy Lutomirski	3	-13/+73
2017-12-23	x86/mm/64: Make a full PGD-entry size hole in the memory map	Andy Lutomirski	1	-2/+2
2017-12-23	x86/cpu_entry_area: Add debugstore entries to cpu_entry_area	Thomas Gleixner	2	-0/+49
2017-12-23	x86/mm/pti: Populate user PGD	Dave Hansen	1	-1/+8
2017-12-23	x86/mm/pti: Allocate a separate user PGD	Dave Hansen	1	-0/+11
2017-12-23	x86/mm/pti: Allow NX poison to be set in p4d/pgd	Dave Hansen	1	-2/+12
2017-12-23	x86/mm/pti: Add mapping helper functions	Dave Hansen	2	-1/+97
2017-12-23	x86/mm/pti: Add infrastructure for page table isolation	Thomas Gleixner	1	-0/+14
2017-12-23	x86/cpufeatures: Add X86_BUG_CPU_INSECURE	Thomas Gleixner	2	-2/+9
2017-12-22	init: Invoke init_espfix_bsp() from mm_init()	Thomas Gleixner	1	-3/+4
2017-12-22	x86/cpu_entry_area: Move it out of the fixmap	Thomas Gleixner	5	-54/+59
2017-12-22	x86/cpu_entry_area: Move it to a separate unit	Thomas Gleixner	2	-40/+53
2017-12-22	x86/mm: Create asm/invpcid.h	Peter Zijlstra	2	-48/+54
2017-12-22	x86/mm: Put MMU to hardware ASID translation in one place	Dave Hansen	1	-11/+18
2017-12-22	x86/mm: Remove hard-coded ASID limit checks	Dave Hansen	1	-2/+18
2017-12-22	x86/mm: Move the CR3 construction functions to tlbflush.h	Dave Hansen	2	-28/+27
2017-12-22	x86/mm: Add comments to clarify which TLB-flush functions are supposed to flu...	Peter Zijlstra	1	-2/+21
2017-12-22	x86/mm: Remove superfluous barriers	Peter Zijlstra	1	-7/+1
2017-12-22	x86/microcode: Dont abuse the TLB-flush interface	Peter Zijlstra	1	-13/+6
2017-12-22	x86/entry: Rename SYSENTER_stack to CPU_ENTRY_AREA_entry_stack	Dave Hansen	3	-9/+9
2017-12-22	x86/ldt: Prevent LDT inheritance on exec	Thomas Gleixner	1	-7/+14
2017-12-22	x86/ldt: Rework locking	Peter Zijlstra	2	-1/+5
2017-12-22	arch, mm: Allow arch_dup_mmap() to fail	Thomas Gleixner	1	-2/+2
2017-12-17	x86/cpufeatures: Make CPU bugs sticky	Thomas Gleixner	2	-2/+4
2017-12-17	x86/paravirt: Provide a way to check for hypervisors	Thomas Gleixner	1	-10/+15
2017-12-17	x86/entry/64: Make cpu_entry_area.tss read-only	Andy Lutomirski	4	-16/+20