index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
x86
/
include
/
asm
/
perf_event.h
Age
Commit message (
Expand
)
Author
Files
Lines
2023-02-21
Merge tag 'sched-core-2023-02-20' of git://git.kernel.org/pub/scm/linux/kerne...
Linus Torvalds
1
-1
/
+1
2023-01-13
x86/perf/amd: Remove tracing from perf_lopwr_cb()
Peter Zijlstra
1
-1
/
+1
2023-01-09
perf/x86/intel: Support Architectural PerfMon Extension leaf
Kan Liang
1
-0
/
+8
2022-11-09
perf/x86/core: Zero @lbr instead of returning -1 in x86_perf_get_lbr() stub
Sean Christopherson
1
-3
/
+3
2022-08-27
perf/x86/amd/lbr: Detect LbrExtV2 support
Sandipan Das
1
-1
/
+2
2022-08-05
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Linus Torvalds
1
-2
/
+9
2022-06-13
perf/x86/amd/uncore: Add PerfMonV2 DF event format
Sandipan Das
1
-0
/
+13
2022-06-13
perf/x86/amd/uncore: Detect available DF counters
Sandipan Das
1
-0
/
+3
2022-06-08
perf: x86/core: Add interface to query perfmon_event_map[] directly
Like Xu
1
-0
/
+6
2022-06-08
perf/x86/core: Pass "struct kvm_pmu *" to determine the guest values
Like Xu
1
-2
/
+2
2022-06-08
perf/x86/intel: Add EPT-Friendly PEBS for Ice Lake Server
Like Xu
1
-0
/
+1
2022-05-11
perf/amd/ibs: Add support for L3 miss filtering
Ravi Bangoria
1
-0
/
+3
2022-05-11
Merge branch 'v5.18-rc5'
Peter Zijlstra
1
-0
/
+5
2022-05-04
perf/x86/amd/core: Detect available counters
Sandipan Das
1
-0
/
+17
2022-04-05
perf/x86/amd: Add idle hooks for branch sampling
Stephane Eranian
1
-0
/
+23
2022-04-05
perf/x86/intel: Don't extend the pseudo-encoding to GP counters
Kan Liang
1
-0
/
+5
2022-02-02
perf/x86/intel: Increase max number of the fixed counters
Kan Liang
1
-1
/
+1
2021-06-17
perf/x86: Reset the dirty counter to prevent the leak for an RDPMC task
Kan Liang
1
-0
/
+1
2021-02-01
perf/x86/intel: Add perf core PMU support for Sapphire Rapids
Kan Liang
1
-2
/
+6
2021-02-01
perf/x86/intel: Filter unsupported Topdown metrics event
Kan Liang
1
-2
/
+8
2021-01-27
x86/perf: Use static_call for x86_pmu.guest_get_msrs
Like Xu
1
-5
/
+1
2020-11-09
perf/x86/intel: Make anythread filter support conditional
Stephane Eranian
1
-1
/
+3
2020-09-10
perf/x86/amd/ibs: Support 27-bit extended Op/cycle counter
Kim Phillips
1
-0
/
+1
2020-08-18
perf/x86/intel: Support TopDown metrics on Ice Lake
Kan Liang
1
-0
/
+2
2020-08-18
perf/x86: Add a macro for RDPMC offset of fixed counters
Kan Liang
1
-0
/
+3
2020-08-18
perf/x86/intel: Generic support for hardware TopDown metrics
Kan Liang
1
-0
/
+47
2020-08-18
perf/x86/intel: Move BTS index to 47
Kan Liang
1
-2
/
+2
2020-08-18
perf/x86/intel: Introduce the fourth fixed counter
Kan Liang
1
-3
/
+20
2020-08-18
perf/x86/intel: Name the global status bit in NMI handler
Kan Liang
1
-10
/
+12
2020-07-08
perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch
Kan Liang
1
-4
/
+0
2020-07-08
perf/x86/intel/lbr: Unify the stored format of LBR information
Kan Liang
1
-5
/
+1
2020-07-08
perf/x86: Expose CPUID enumeration bits for arch LBR
Kan Liang
1
-0
/
+40
2020-07-02
perf/x86: Add constraint to create guest LBR event without hw counter
Like Xu
1
-1
/
+21
2020-07-02
perf/x86/lbr: Add interface to get LBR information
Like Xu
1
-0
/
+12
2020-03-17
perf/amd/uncore: Add support for Family 19h L3 PMU
Kim Phillips
1
-2
/
+13
2020-01-13
perf/x86: Provide stubs of KVM helpers for non-Intel CPUs
Sean Christopherson
1
-7
/
+15
2019-08-30
perf/x86/amd/ibs: Fix sample bias for dispatched micro-ops
Kim Phillips
1
-4
/
+8
2019-04-29
perf/x86: Make perf callchains work without CONFIG_FRAME_POINTER
Kairui Song
1
-6
/
+1
2019-04-16
perf/x86/intel: Add Icelake support
Kan Liang
1
-1
/
+1
2019-04-16
perf/x86/intel: Support adaptive PEBS v4
Kan Liang
1
-0
/
+43
2019-04-16
perf/x86: Support outputting XMM registers
Kan Liang
1
-0
/
+5
2018-10-02
Merge branch 'x86/cache' into perf/core, to resolve conflicts
Ingo Molnar
1
-0
/
+1
2018-10-02
perf/x86/amd/uncore: Set ThreadMask and SliceMask for L3 Cache perf events
Natarajan, Janakarajan
1
-0
/
+8
2018-09-28
perf/x86: Add helper to obtain performance counter index
Reinette Chatre
1
-0
/
+1
2017-11-02
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Greg Kroah-Hartman
1
-0
/
+1
2016-04-28
perf/x86/intel/pt: Don't die on VMXON
Alexander Shishkin
1
-0
/
+4
2016-03-08
perf/x86/intel: Add definition for PT PMI bit
Stephane Eranian
1
-0
/
+1
2015-08-04
x86: Add new MSRs and MSR bits used for Intel Skylake PMU support
Andi Kleen
1
-0
/
+7
2014-11-12
perf/x86/amd/ibs: Update IBS MSRs and feature definitions
Aravind Gopalakrishnan
1
-0
/
+3
2014-08-13
perf/x86: Revamp PEBS event selection
Andi Kleen
1
-0
/
+8
[next]