starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2020-09-09	x86/sev-es: Allocate and map an IST stack for #VC handler	Joerg Roedel	1	-12/+21
2020-06-11	x86/entry: Remove DBn stacks	Peter Zijlstra	1	-9/+3
2019-12-10	mm, x86/mm: Untangle address space layout definitions from basic pgtable type...	Ingo Molnar	1	-9/+1
2019-11-26	x86/doublefault/32: Move #DF stack and TSS to cpu_entry_area	Andy Lutomirski	1	-0/+12
2019-11-25	x86/pti/32: Calculate the various PTI cpu_entry_area sizes correctly, make th...	Ingo Molnar	1	-5/+7
2019-11-21	x86/cpu_entry_area: Add guard page for entry stack on 32bit	Thomas Gleixner	1	-1/+5
2019-10-01	x86: Use the correct SPDX License Identifier in headers	Nishad Kamdar	1	-1/+1
2019-04-17	x86/exceptions: Split debug IST stack	Thomas Gleixner	1	-4/+10
2019-04-17	x86/exceptions: Enable IST guard pages	Thomas Gleixner	1	-6/+2
2019-04-17	x86/exceptions: Disconnect IST index and stack order	Thomas Gleixner	1	-0/+11
2019-04-17	x86/cpu_entry_area: Provide exception stack accessor	Thomas Gleixner	1	-0/+4
2019-04-17	x86/exceptions: Add structs for exception stacks	Thomas Gleixner	1	-5/+47
2018-09-12	x86/pti/64: Remove the SYSCALL64 entry trampoline	Andy Lutomirski	1	-2/+0
2017-12-23	x86/cpu_entry_area: Add debugstore entries to cpu_entry_area	Thomas Gleixner	1	-0/+13
2017-12-22	x86/cpu_entry_area: Move it out of the fixmap	Thomas Gleixner	1	-1/+17
2017-12-22	x86/cpu_entry_area: Move it to a separate unit	Thomas Gleixner	1	-0/+52