starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2010-01-26	sh: Mass ctrl_in/outX to __raw_read/writeX conversion.	Paul Mundt	1	-5/+5
2010-01-21	sh: Kill off the special uncached section and fixmap.	Paul Mundt	1	-2/+1
2010-01-19	sh: Split out MMUCR.URB based entry wiring in to shared helper.	Paul Mundt	1	-66/+0
2010-01-16	sh: New extended page flag to wire/unwire TLB entries	Matt Fleming	1	-0/+66
2009-09-01	Merge branch 'master' into sh/smp	Paul Mundt	1	-3/+6
2009-08-20	sh: Better description of SH-4 PTEA register update.	Michael Trimarchi	1	-3/+6
2009-07-29	sh: Handle a NULL vma in __update_tlb() for the fast-path.	Paul Mundt	1	-1/+1
2009-07-28	sh: update_mmu_cache() consolidation.	Paul Mundt	1	-23/+6
2009-07-22	sh: Migrate from PG_mapped to PG_dcache_dirty.	Paul Mundt	1	-12/+11
2008-01-28	sh: Preparation for uncached jumps through PMB.	Stuart Menefy	1	-3/+4
2007-09-21	sh: Fix up extended mode TLB for SH-X2+ cores.	Paul Mundt	1	-17/+13
2007-09-21	sh: Support explicit L1 cache disabling.	Paul Mundt	1	-10/+15
2007-03-05	sh: Revert lazy dcache writeback changes.	Paul Mundt	1	-1/+67
2007-02-13	sh: Local TLB flushing variants for SMP prep.	Paul Mundt	1	-1/+1
2007-02-13	sh: Lazy dcache writeback optimizations.	Paul Mundt	1	-67/+1
2006-09-27	sh: Add flag for MMU PTEA capability.	Paul Mundt	1	-8/+4
2006-09-27	sh: Support for SH7770/SH7780 CPU subtypes.	Paul Mundt	1	-0/+4
2005-04-17	Linux-2.6.12-rc2	Linus Torvalds	1	-0/+96