| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2008-01-28 | sh: Preparation for uncached jumps through PMB. | Stuart Menefy | 1 | -3/+4 |
| 2007-09-21 | sh: Fix up extended mode TLB for SH-X2+ cores. | Paul Mundt | 1 | -17/+13 |
| 2007-09-21 | sh: Support explicit L1 cache disabling. | Paul Mundt | 1 | -10/+15 |
| 2007-03-05 | sh: Revert lazy dcache writeback changes. | Paul Mundt | 1 | -1/+67 |
| 2007-02-13 | sh: Local TLB flushing variants for SMP prep. | Paul Mundt | 1 | -1/+1 |
| 2007-02-13 | sh: Lazy dcache writeback optimizations. | Paul Mundt | 1 | -67/+1 |
| 2006-09-27 | sh: Add flag for MMU PTEA capability. | Paul Mundt | 1 | -8/+4 |
| 2006-09-27 | sh: Support for SH7770/SH7780 CPU subtypes. | Paul Mundt | 1 | -0/+4 |
| 2005-04-17 | Linux-2.6.12-rc2 | Linus Torvalds | 1 | -0/+96 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
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