starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2018-02-07	Merge tag 'riscv-for-linus-4.16-merge_window' of git://git.kernel.org/pub/scm...	Linus Torvalds	16	-76/+248
2018-02-02	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-1/+0
2018-02-01	Merge branch 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel...	Linus Torvalds	2	-2/+1
2018-01-31	Merge tag 'dma-mapping-4.16' of git://git.infradead.org/users/hch/dma-mapping	Linus Torvalds	3	-39/+2
2018-01-31	riscv: inline set_pgdir into its only caller	Christoph Hellwig	1	-11/+6
2018-01-31	riscv: rename sptbr to satp	Christoph Hellwig	4	-11/+20
2018-01-31	riscv: don't read back satp in paging_init	Christoph Hellwig	1	-2/+0
2018-01-31	riscv: remove the unused current_pgdir function	Christoph Hellwig	1	-5/+0
2018-01-31	riscv: add ZONE_DMA32	Christoph Hellwig	3	-4/+20
2018-01-31	RISC-V: Limit the scope of TLB shootdowns	Andrew Waterman	1	-8/+12
2018-01-31	riscv: disable SUM in the exception handler	Christoph Hellwig	1	-3/+6
2018-01-31	riscv: remove redundant unlikely()	Tobias Klauser	1	-1/+1
2018-01-31	riscv: remove unused __ARCH_HAVE_MMU define	Tobias Klauser	1	-1/+0
2018-01-31	riscv/ftrace: Add basic support	Alan Kao	6	-1/+189
2018-01-31	RISC-V: Remove mem_end command line processing	Palmer Dabbelt	1	-19/+0
2018-01-31	RISC-V: Remove duplicate command-line parsing logic	Michael Clark	1	-16/+0
2018-01-29	Merge tag 'init_task-20180117' of git://git.kernel.org/pub/scm/linux/kernel/g...	Linus Torvalds	1	-2/+0
2018-01-15	dma-direct: rename dma_noop to dma_direct	Christoph Hellwig	1	-1/+1
2018-01-15	dma-mapping: provide a generic asm/dma-mapping.h	Christoph Hellwig	2	-30/+1
2018-01-10	Construct init thread stack in the linker script rather than by union	David Howells	1	-2/+0
2018-01-09	riscv: remove the unused dma_capable helper	Christoph Hellwig	1	-8/+0
2018-01-08	riscv: rename SR_* constants to match the spec	Christoph Hellwig	6	-17/+17
2018-01-08	riscv: remove CONFIG_MMU ifdefs	Christoph Hellwig	4	-24/+0
2018-01-08	RISC-V: Make __NR_riscv_flush_icache visible to userspace	Palmer Dabbelt	5	-30/+27
2018-01-08	RISC-V: Add a basic defconfig	Karsten Merker	1	-0/+75
2018-01-03	arch: Remove clkdev.h asm-generic from Kbuild	Stephen Boyd	1	-1/+0
2017-12-11	RISC-V: Remove unused CONFIG_HVC_RISCV_SBI code	Palmer Dabbelt	1	-11/+0
2017-12-11	RISC-V: Resurrect smp_mb__after_spinlock()	Palmer Dabbelt	1	-0/+19
2017-12-11	RISC-V: Logical vs Bitwise typo	Dan Carpenter	1	-1/+1
2017-12-05	bpf: correct broken uapi for BPF_PROG_TYPE_PERF_EVENT program type	Hendrik Brueckner	1	-0/+1
2017-12-05	riscv: use linux/uaccess.h, not asm/uaccess.h...	Al Viro	2	-2/+1
2017-12-02	RISC-V: Fixes for clean allmodconfig build	Palmer Dabbelt	12	-21/+39
2017-12-02	RISC-V: __io_writes should respect the length argument	Palmer Dabbelt	1	-1/+1
2017-12-02	RISC-V: User-Visible Changes	Palmer Dabbelt	19	-34/+392
2017-12-02	RISC-V: __io_writes should respect the length argument	Palmer Dabbelt	1	-1/+1
2017-11-30	RISC-V: Clean up an unused include	Palmer Dabbelt	1	-1/+0
2017-11-30	RISC-V: Allow userspace to flush the instruction cache	Andrew Waterman	8	-0/+105
2017-11-30	RISC-V: Flush I$ when making a dirty page executable	Andrew Waterman	8	-30/+174
2017-11-30	RISC-V: Add missing include	Olof Johansson	1	-0/+1
2017-11-30	RISC-V: Use define for get_cycles like other architectures	Olof Johansson	1	-1/+2
2017-11-30	RISC-V: Provide stub of setup_profiling_timer()	Olof Johansson	1	-0/+7
2017-11-30	RISC-V: Export some expected symbols for modules	Olof Johansson	3	-0/+6
2017-11-30	RISC-V: move empty_zero_page definition to C and export it	Olof Johansson	2	-3/+3
2017-11-30	RISC-V: io.h: type fixes for warnings	Olof Johansson	2	-8/+10
2017-11-30	RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros	Olof Johansson	2	-9/+9
2017-11-30	RISC-V: use generic serial.h	Olof Johansson	1	-0/+1
2017-11-29	RISC-V: remove spin_unlock_wait()	Palmer Dabbelt	1	-9/+0
2017-11-29	RISC-V: `sfence.vma` orderes the instruction cache	Palmer Dabbelt	1	-1/+4
2017-11-29	RISC-V: Add READ_ONCE in arch_spin_is_locked()	Palmer Dabbelt	1	-1/+1
2017-11-29	RISC-V: __test_and_op_bit_ord should be strongly ordered	Palmer Dabbelt	1	-1/+1