starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2018-07-05	RISC-V: Fix the rv32i kernel build	Palmer Dabbelt	4	-13/+21
2018-07-05	RISC-V: Fix PTRACE_SETREGSET bug.	Jim Wilson	1	-1/+1
2018-07-05	RISC-V: Don't include irq-riscv-intc.h	Palmer Dabbelt	1	-4/+0
2018-07-05	riscv: remove unnecessary of_platform_populate call	Rob Herring	1	-5/+0
2018-07-05	RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations	Andreas Schwab	1	-2/+2
2018-07-04	RISC-V: Change variable type for 32-bit compatible	Zong Li	1	-11/+11
2018-07-04	RISC-V: Add definiion of extract symbol's index and type for 32-bit	Zong Li	1	-2/+7
2018-07-04	RISC-V: Select GENERIC_UCMPDI2 on RV32I	Zong Li	1	-0/+1
2018-07-04	RISC-V: Add conditional macro for zone of DMA32	Zong Li	1	-0/+2
2018-06-16	Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...	Linus Torvalds	15	-14/+626
2018-06-12	Merge tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/l...	Linus Torvalds	1	-3/+3
2018-06-11	RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig	Palmer Dabbelt	1	-0/+1
2018-06-11	RISC-V: Make our port sparse-clean	Palmer Dabbelt	6	-9/+14
2018-06-11	RISC-V: Handle R_RISCV_32 in modules	Andreas Schwab	1	-0/+12
2018-06-11	riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't set	Alan Kao	1	-1/+1
2018-06-11	riscv: add riscv-specific predefines to CHECKFLAGS	Luc Van Oostenryck	1	-0/+3
2018-06-09	riscv: split the declaration of __copy_user	Luc Van Oostenryck	3	-6/+11
2018-06-08	Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...	Linus Torvalds	1	-1/+0
2018-06-08	mm: introduce ARCH_HAS_PTE_SPECIAL	Laurent Dufour	2	-3/+1
2018-06-07	riscv: no __user for probe_kernel_address()	Luc Van Oostenryck	1	-1/+1
2018-06-07	riscv: use NULL instead of a plain 0	Luc Van Oostenryck	2	-2/+2
2018-06-05	Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...	Linus Torvalds	1	-14/+2
2018-06-05	RISC-V: Preliminary Perf Support	Palmer Dabbelt	5	-0/+586
2018-06-05	perf: riscv: preliminary RISC-V support	Alan Kao	5	-0/+586
2018-06-04	riscv: Fix the bug in memory access fixup code	Alan Kao	1	-4/+9
2018-05-19	riscv: add swiotlb support	Christoph Hellwig	3	-0/+18
2018-05-19	riscv: only enable ZONE_DMA32 for 64-bit	Christoph Hellwig	1	-1/+1
2018-05-19	riscv: simplify Kconfig magic for 32-bit vs 64-bit kernels	Christoph Hellwig	1	-25/+6
2018-05-17	drivers: base: cacheinfo: setup DT cache properties early	Jeremy Linton	1	-1/+0
2018-05-09	arch: define the ARCH_DMA_ADDR_T_64BIT config symbol in lib/Kconfig	Christoph Hellwig	1	-3/+0
2018-05-09	arch: remove the ARCH_PHYS_ADDR_T_64BIT config symbol	Christoph Hellwig	1	-4/+2
2018-05-08	dma-debug: remove CONFIG_HAVE_DMA_API_DEBUG	Christoph Hellwig	1	-1/+0
2018-05-07	PCI: remove PCI_DMA_BUS_IS_PHYS	Christoph Hellwig	1	-3/+0
2018-04-25	signal/riscv: Replace do_trap_siginfo with force_sig_fault	Eric W. Biederman	1	-8/+2
2018-04-25	signal/riscv: Use force_sig_fault where appropriate	Eric W. Biederman	1	-8/+1
2018-04-25	signal: Ensure every siginfo we send has all bits initialized	Eric W. Biederman	1	-0/+1
2018-04-24	RISC-V: build vdso-dummy.o with -no-pie	Aurelien Jarno	1	-1/+1
2018-04-24	riscv: there is no <asm/handle_irq.h>	Christoph Hellwig	1	-1/+0
2018-04-24	riscv: select DMA_DIRECT_OPS instead of redefining it	Christoph Hellwig	1	-3/+1
2018-04-23	lib: Rename compiler intrinsic selects to GENERIC_LIB_*	Matt Redfearn	1	-3/+3
2018-04-05	Merge tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...	Linus Torvalds	19	-255/+1598
2018-04-05	Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...	Linus Torvalds	4	-17/+5
2018-04-03	RISC-V: Rename CONFIG_CMDLINE_OVERRIDE to CONFIG_CMDLINE_FORCE	Palmer Dabbelt	1	-2/+2
2018-04-03	RISC-V: Fixes to module loading	Palmer Dabbelt	9	-6/+470
2018-04-03	RISC-V: Assorted memory model fixes	Palmer Dabbelt	5	-234/+630
2018-04-03	RISC-V: Add definition of relocation types	Zong Li	1	-0/+7
2018-04-03	RISC-V: Enable module support in defconfig	Zong Li	1	-0/+2
2018-04-03	RISC-V: Support SUB32 relocation type in kernel module	Zong Li	1	-0/+8
2018-04-03	RISC-V: Support ADD32 relocation type in kernel module	Zong Li	1	-0/+8
2018-04-03	RISC-V: Support ALIGN relocation type in kernel module	Zong Li	1	-0/+10