Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2023-06-22 | riscv: Update arch_sync_dma_for_device() function | Ley Foon Tan | 1 | -1/+11 |
2023-06-22 | riscv: invalidate cache when DMA_BIDIRECTIONAL case in arch_sync_dma_for_cpu() | Ley Foon Tan | 1 | -2/+0 |
2023-03-20 | riscv: starfive: Add DMA non-coherent support in StarFive Dubhe | Genevieve Chan | 1 | -0/+1 |
2023-03-20 | riscv: starfive: Add DMA non-coherent support | Ley Foon Tan | 1 | -0/+54 |
2023-03-20 | riscv: Implement non-coherent DMA support via SiFive cache flushing | Emil Renner Berthing | 1 | -2/+35 |
2022-10-21 | RISC-V: Fix compilation without RISCV_ISA_ZICBOM | Andrew Jones | 1 | -41/+0 |
2022-10-02 | RISC-V: KVM: Provide UAPI for Zicbom block size | Andrew Jones | 1 | -0/+2 |
2022-09-13 | RISC-V: Clean up the Zicbom block size probing | Palmer Dabbelt | 1 | -10/+13 |
2022-08-11 | riscv: implement Zicbom-based CMO instructions + the t-head variant | Palmer Dabbelt | 1 | -0/+116 |
2022-07-29 | riscv: Add support for non-coherent devices using zicbom extension | Heiko Stuebner | 1 | -0/+112 |