starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2021-07-01	riscv: add ASID-based tlbflushing methods	Guo Ren	1	-1/+1
2021-06-09	riscv: mm: Use better bitmap_zalloc()	Kefeng Wang	1	-2/+1
2021-05-29	riscv: Add __init section marker to some functions again	Jisheng Zhang	1	-1/+1
2021-05-26	riscv: Optimize switch_mm by passing "cpu" to flush_icache_deferred()	Jisheng Zhang	1	-3/+4
2021-02-19	RISC-V: Implement ASID allocator	Anup Patel	1	-4/+261
2019-11-18	riscv: add nommu support	Christoph Hellwig	1	-0/+2
2019-10-28	riscv: add missing header file includes	Paul Walmsley	1	-0/+1
2019-08-30	riscv: Using CSR numbers to access CSRs	Bin Meng	1	-6/+1
2019-05-17	riscv: move switch_mm to its own file	Gary Guo	1	-0/+69